Searched refs:CLK_TOP_UNIVPLL_D5_D4 (Results 1 – 12 of 12) sorted by relevance
| /linux-6.1.9/include/dt-bindings/clock/ |
| D | mt6779-clk.h | 81 #define CLK_TOP_UNIVPLL_D5_D4 71 macro
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| D | mt8183-clk.h | 106 #define CLK_TOP_UNIVPLL_D5_D4 70 macro
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| D | mt8186-clk.h | 111 #define CLK_TOP_UNIVPLL_D5_D4 92 macro
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| D | mt8192-clk.h | 105 #define CLK_TOP_UNIVPLL_D5_D4 93 macro
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| D | mt8195-clk.h | 162 #define CLK_TOP_UNIVPLL_D5_D4 150 macro
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| /linux-6.1.9/arch/arm64/boot/dts/mediatek/ |
| D | mt8195.dtsi | 1056 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
1057 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
1123 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
1124 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
1147 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
1148 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
1171 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
1172 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
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| D | mt8192.dtsi | 753 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
754 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
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| /linux-6.1.9/drivers/clk/mediatek/ |
| D | clk-mt8186-topckgen.c | 46 FACTOR(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4),
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| D | clk-mt8195-topckgen.c | 64 FACTOR(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4),
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| D | clk-mt6779.c | 57 FACTOR(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4),
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| D | clk-mt8183.c | 90 FACTOR(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1,
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| D | clk-mt8192.c | 58 FACTOR(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4),
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