/linux-6.1.9/Documentation/devicetree/bindings/media/ |
D | mediatek,vcodec-decoder.yaml | 143 <&topckgen CLK_TOP_UNIVPLL_D2>, 164 <&topckgen CLK_TOP_UNIVPLL_D2>,
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/linux-6.1.9/include/dt-bindings/clock/ |
D | mt8516-clk.h | 51 #define CLK_TOP_UNIVPLL_D2 19 macro
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D | mt7622-clk.h | 43 #define CLK_TOP_UNIVPLL_D2 31 macro
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D | mt6797-clk.h | 67 #define CLK_TOP_UNIVPLL_D2 57 macro
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D | mediatek,mt6795-clk.h | 70 #define CLK_TOP_UNIVPLL_D2 59 macro
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D | mt8173-clk.h | 72 #define CLK_TOP_UNIVPLL_D2 62 macro
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D | mt6765-clk.h | 57 #define CLK_TOP_UNIVPLL_D2 22 macro
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D | mediatek,mt8365-clk.h | 32 #define CLK_TOP_UNIVPLL_D2 22 macro
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D | mt6779-clk.h | 70 #define CLK_TOP_UNIVPLL_D2 60 macro
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D | mt8183-clk.h | 95 #define CLK_TOP_UNIVPLL_D2 59 macro
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D | mt8186-clk.h | 101 #define CLK_TOP_UNIVPLL_D2 82 macro
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D | mt2712-clk.h | 56 #define CLK_TOP_UNIVPLL_D2 25 macro
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D | mt2701-clk.h | 28 #define CLK_TOP_UNIVPLL_D2 18 macro
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D | mt8195-clk.h | 154 #define CLK_TOP_UNIVPLL_D2 142 macro
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/linux-6.1.9/drivers/clk/mediatek/ |
D | clk-mt6795-topckgen.c | 426 FACTOR(CLK_TOP_UNIVPLL_D2, "univpll_d2", "univ_624m", 1, 1),
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D | clk-mt8186-topckgen.c | 36 FACTOR(CLK_TOP_UNIVPLL_D2, "univpll_d2", "univpll", 1, 2),
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D | clk-mt6797.c | 49 FACTOR(CLK_TOP_UNIVPLL_D2, "univpll_d2", "univpll", 1, 2),
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D | clk-mt8516.c | 45 FACTOR(CLK_TOP_UNIVPLL_D2, "univpll_d2", "univpll", 1, 2),
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D | clk-mt7622.c | 410 FACTOR(CLK_TOP_UNIVPLL_D2, "univpll_d2", "univpll", 1, 2),
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D | clk-mt8195-topckgen.c | 56 FACTOR(CLK_TOP_UNIVPLL_D2, "univpll_d2", "univpll", 1, 2),
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D | clk-mt8167.c | 49 FACTOR(CLK_TOP_UNIVPLL_D2, "univpll_d2", "univpll", 1, 2),
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D | clk-mt2701.c | 77 FACTOR(CLK_TOP_UNIVPLL_D2, "univpll_d2", "univpll", 1, 2),
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D | clk-mt6779.c | 46 FACTOR(CLK_TOP_UNIVPLL_D2, "univpll_d2", "univpll", 1, 2),
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D | clk-mt2712.c | 97 FACTOR(CLK_TOP_UNIVPLL_D2, "univpll_d2", "univpll_ck", 1,
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D | clk-mt6765.c | 107 FACTOR(CLK_TOP_UNIVPLL_D2, "univpll_d2", "univpll", 1, 2),
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