Searched refs:CLK_SMMU_MFCL (Results 1 – 9 of 9) sorted by relevance
| /linux-6.1.9/include/dt-bindings/clock/ |
| D | exynos5250.h | 71 #define CLK_SMMU_MFCL 267 macro
|
| D | exynos5420.h | 137 #define CLK_SMMU_MFCL 402 macro
|
| D | exynos4.h | 112 #define CLK_SMMU_MFCL 274 macro
|
| /linux-6.1.9/drivers/clk/samsung/ |
| D | clk-exynos5250.c | 544 GATE(CLK_SMMU_MFCL, "smmu_mfcl", "mout_aclk333_sub", GATE_IP_MFC, 2, 0,
|
| D | clk-exynos4.c | 824 GATE(CLK_SMMU_MFCL, "smmu_mfcl", "aclk100", GATE_IP_MFC, 1,
|
| D | clk-exynos5420.c | 1280 GATE(CLK_SMMU_MFCL, "smmu_mfcl", "dout_mfc_blk", GATE_IP_MFC, 1, 0, 0),
|
| /linux-6.1.9/arch/arm/boot/dts/ |
| D | exynos4.dtsi | 887 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
|
| D | exynos5250.dtsi | 878 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
|
| D | exynos5420.dtsi | 1032 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
|