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Searched refs:CLK_SET_PARENT_GATE (Results 1 – 25 of 28) sorted by relevance

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/linux-6.1.9/drivers/clk/imx/
Dclk-imx7d.c498 …"enet_axi_src", base + 0x8900, 24, 3, enet_axi_sel, ARRAY_SIZE(enet_axi_sel), CLK_SET_PARENT_GATE); in imx7d_clocks_init()
499 …c", base + 0x8980, 24, 3, nand_usdhc_bus_sel, ARRAY_SIZE(nand_usdhc_bus_sel), CLK_SET_PARENT_GATE); in imx7d_clocks_init()
500 …am_phym_src", base + 0x9800, 24, 1, dram_phym_sel, ARRAY_SIZE(dram_phym_sel), CLK_SET_PARENT_GATE); in imx7d_clocks_init()
501 …_mux2_flags("dram_src", base + 0x9880, 24, 1, dram_sel, ARRAY_SIZE(dram_sel), CLK_SET_PARENT_GATE); in imx7d_clocks_init()
502 …src", base + 0xa000, 24, 3, dram_phym_alt_sel, ARRAY_SIZE(dram_phym_alt_sel), CLK_SET_PARENT_GATE); in imx7d_clocks_init()
503 …"dram_alt_src", base + 0xa080, 24, 3, dram_alt_sel, ARRAY_SIZE(dram_alt_sel), CLK_SET_PARENT_GATE); in imx7d_clocks_init()
504 …"usb_hsic_src", base + 0xa100, 24, 3, usb_hsic_sel, ARRAY_SIZE(usb_hsic_sel), CLK_SET_PARENT_GATE); in imx7d_clocks_init()
505 …ie_ctrl_src", base + 0xa180, 24, 3, pcie_ctrl_sel, ARRAY_SIZE(pcie_ctrl_sel), CLK_SET_PARENT_GATE); in imx7d_clocks_init()
506 …"pcie_phy_src", base + 0xa200, 24, 3, pcie_phy_sel, ARRAY_SIZE(pcie_phy_sel), CLK_SET_PARENT_GATE); in imx7d_clocks_init()
507 …pixel_src", base + 0xa280, 24, 3, epdc_pixel_sel, ARRAY_SIZE(epdc_pixel_sel), CLK_SET_PARENT_GATE); in imx7d_clocks_init()
[all …]
Dclk-imx7ulp.c73 …s("apll_pre_sel", base + 0x508, 0, 1, pll_pre_sels, ARRAY_SIZE(pll_pre_sels), CLK_SET_PARENT_GATE); in imx7ulp_clk_scg1_init()
74 …s("spll_pre_sel", base + 0x608, 0, 1, pll_pre_sels, ARRAY_SIZE(pll_pre_sels), CLK_SET_PARENT_GATE); in imx7ulp_clk_scg1_init()
97 …0x508, 14, 2, apll_pfd_sels, ARRAY_SIZE(apll_pfd_sels), CLK_SET_RATE_PARENT | CLK_SET_PARENT_GATE); in imx7ulp_clk_scg1_init()
98 …0x608, 14, 2, spll_pfd_sels, ARRAY_SIZE(spll_pfd_sels), CLK_SET_RATE_PARENT | CLK_SET_PARENT_GATE); in imx7ulp_clk_scg1_init()
99 …, base + 0x508, 1, 1, apll_sels, ARRAY_SIZE(apll_sels), CLK_SET_RATE_PARENT | CLK_SET_PARENT_GATE); in imx7ulp_clk_scg1_init()
100 …, base + 0x608, 1, 1, spll_sels, ARRAY_SIZE(spll_sels), CLK_SET_RATE_PARENT | CLK_SET_PARENT_GATE); in imx7ulp_clk_scg1_init()
Dclk-imx8ulp.c167 …("spll2_pre_sel", base + 0x510, 0, 1, pll_pre_sels, ARRAY_SIZE(pll_pre_sels), CLK_SET_PARENT_GATE); in imx8ulp_clk_cgc1_init()
168 …("spll3_pre_sel", base + 0x610, 0, 1, pll_pre_sels, ARRAY_SIZE(pll_pre_sels), CLK_SET_PARENT_GATE); in imx8ulp_clk_cgc1_init()
249 …s("pll4_pre_sel", base + 0x610, 0, 1, pll_pre_sels, ARRAY_SIZE(pll_pre_sels), CLK_SET_PARENT_GATE); in imx8ulp_clk_cgc2_init()
254 …w_mux_flags("hifi_sel", base + 0x14, 28, 3, hifi_sels, ARRAY_SIZE(hifi_sels), CLK_SET_PARENT_GATE); in imx8ulp_clk_cgc2_init()
258 …k_hw_mux_flags("ddr_sel", base + 0x40, 28, 3, ddr_sels, ARRAY_SIZE(ddr_sels), CLK_SET_PARENT_GATE); in imx8ulp_clk_cgc2_init()
Dclk-composite-7ulp.c144 CLK_SET_PARENT_GATE | CLK_SET_RATE_NO_REPARENT); in imx_ulp_clk_hw_composite()
Dclk-composite-8m.c220 flags |= CLK_SET_PARENT_GATE; in __imx8m_clk_hw_composite()
/linux-6.1.9/drivers/clk/qcom/
Dgcc-msm8660.c132 .flags = CLK_SET_PARENT_GATE,
183 .flags = CLK_SET_PARENT_GATE,
234 .flags = CLK_SET_PARENT_GATE,
285 .flags = CLK_SET_PARENT_GATE,
336 .flags = CLK_SET_PARENT_GATE,
387 .flags = CLK_SET_PARENT_GATE,
438 .flags = CLK_SET_PARENT_GATE,
489 .flags = CLK_SET_PARENT_GATE,
540 .flags = CLK_SET_PARENT_GATE,
591 .flags = CLK_SET_PARENT_GATE,
[all …]
Dgcc-mdm9615.c212 .flags = CLK_SET_PARENT_GATE,
263 .flags = CLK_SET_PARENT_GATE,
314 .flags = CLK_SET_PARENT_GATE,
365 .flags = CLK_SET_PARENT_GATE,
416 .flags = CLK_SET_PARENT_GATE,
479 .flags = CLK_SET_PARENT_GATE,
528 .flags = CLK_SET_PARENT_GATE,
577 .flags = CLK_SET_PARENT_GATE,
626 .flags = CLK_SET_PARENT_GATE,
675 .flags = CLK_SET_PARENT_GATE,
[all …]
Dgcc-msm8960.c376 .flags = CLK_SET_PARENT_GATE,
427 .flags = CLK_SET_PARENT_GATE,
478 .flags = CLK_SET_PARENT_GATE,
529 .flags = CLK_SET_PARENT_GATE,
580 .flags = CLK_SET_PARENT_GATE,
631 .flags = CLK_SET_PARENT_GATE,
682 .flags = CLK_SET_PARENT_GATE,
733 .flags = CLK_SET_PARENT_GATE,
784 .flags = CLK_SET_PARENT_GATE,
835 .flags = CLK_SET_PARENT_GATE,
[all …]
Dgcc-ipq806x.c439 .flags = CLK_SET_PARENT_GATE,
490 .flags = CLK_SET_PARENT_GATE,
541 .flags = CLK_SET_PARENT_GATE,
592 .flags = CLK_SET_PARENT_GATE,
643 .flags = CLK_SET_PARENT_GATE,
694 .flags = CLK_SET_PARENT_GATE,
758 .flags = CLK_SET_PARENT_GATE,
809 .flags = CLK_SET_PARENT_GATE,
860 .flags = CLK_SET_PARENT_GATE | CLK_IGNORE_UNUSED,
911 .flags = CLK_SET_PARENT_GATE,
[all …]
/linux-6.1.9/drivers/clk/at91/
Dsama7g5.c230 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
247 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
264 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
273 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
291 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
Dclk-smd.c124 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in at91sam9x5_clk_register_smd()
Dclk-audio-pll.c497 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | in at91_clk_register_audio_pll_pad()
528 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | in at91_clk_register_audio_pll_pmc()
Dclk-programmable.c238 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in at91_clk_register_programmable()
Dsam9x60.c262 CLK_SET_PARENT_GATE | in sam9x60_pmc_setup()
Dclk-generated.c339 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in at91_clk_register_generated()
Dclk-usb.c240 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | in _at91sam9x5_clk_register_usb()
Dclk-peripheral.c469 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | in at91_clk_register_sam9x5_peripheral()
Dclk-main.c568 init.flags = CLK_SET_PARENT_GATE; in at91_clk_register_sam9x5_main()
Dclk-master.c832 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in at91_clk_sama7g5_register_master()
/linux-6.1.9/drivers/clk/microchip/
Dclk-pic32mzda.c53 .flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE,\
/linux-6.1.9/drivers/media/platform/atmel/
Datmel-isc-clk.c260 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in isc_clk_register()
/linux-6.1.9/drivers/clk/
Dclk-axi-clkgen.c546 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in axi_clkgen_probe()
Dclk.c2155 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { in clk_calc_new_rates()
2700 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) in clk_core_set_parent_nolock()
3303 ENTRY(CLK_SET_PARENT_GATE),
/linux-6.1.9/drivers/clk/zynqmp/
Dclkc.c285 ccf_flag |= CLK_SET_PARENT_GATE; in zynqmp_clk_map_common_ccf_flags()
/linux-6.1.9/drivers/clk/ingenic/
Dcgu.c731 clk_init.flags |= CLK_SET_PARENT_GATE; in ingenic_register_clock()

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