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Searched refs:CLK_SEL (Results 1 – 5 of 5) sorted by relevance

/linux-6.1.9/drivers/clk/mvebu/
Darmada-37xx-periph.c34 #define CLK_SEL 0x10 macro
703 data->clk_sel = readl(data->reg + CLK_SEL); in armada_3700_periph_clock_suspend()
719 writel(data->clk_sel, data->reg + CLK_SEL); in armada_3700_periph_clock_resume()
/linux-6.1.9/drivers/staging/rts5208/
Drtsx_chip.c641 retval = rtsx_write_register(chip, CLK_SEL, 0x03, 0x03); in rts5208_init()
644 retval = rtsx_read_register(chip, CLK_SEL, &val); in rts5208_init()
700 retval = rtsx_write_register(chip, CLK_SEL, 0x03, 0x03); in rts5288_init()
703 retval = rtsx_read_register(chip, CLK_SEL, &val); in rts5288_init()
Drtsx_card.h821 #define CLK_SEL 0xFC04 macro
Drtsx_card.c795 retval = rtsx_write_register(chip, CLK_SEL, 0xFF, sel); in switch_normal_clock()
/linux-6.1.9/include/linux/
Drtsx_pci.h457 #define CLK_SEL 0xFC04 macro