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Searched refs:CLK_SDMMC2 (Results 1 – 12 of 12) sorted by relevance

/linux-6.1.9/include/dt-bindings/clock/
Dexynos5250.h86 #define CLK_SDMMC2 282 macro
Dexynos4.h137 #define CLK_SDMMC2 299 macro
Dexynos3250.h229 #define CLK_SDMMC2 223 macro
Drk3568-cru.h257 #define CLK_SDMMC2 194 macro
/linux-6.1.9/drivers/clk/samsung/
Dclk-exynos5250.c563 GATE(CLK_SDMMC2, "sdmmc2", "div_aclk200", GATE_IP_FSYS, 14, 0, 0),
Dclk-exynos3250.c643 GATE(CLK_SDMMC2, "sdmmc2", "div_aclk_200", GATE_IP_FSYS, 7, 0, 0),
Dclk-exynos4.c843 GATE(CLK_SDMMC2, "sdmmc2", "aclk133", GATE_IP_FSYS, 7,
/linux-6.1.9/arch/arm/boot/dts/
Dexynos3250.dtsi407 clocks = <&cmu CLK_SDMMC2>, <&cmu CLK_SCLK_MMC2>;
Dexynos4.dtsi341 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
Dexynos5250.dtsi570 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
/linux-6.1.9/drivers/clk/rockchip/
Dclk-rk3568.c950 COMPOSITE_NODIV(CLK_SDMMC2, "clk_sdmmc2", clk_sdmmc_p, 0,
/linux-6.1.9/arch/arm64/boot/dts/rockchip/
Drk356x.dtsi639 clocks = <&cru HCLK_SDMMC2>, <&cru CLK_SDMMC2>,