Home
last modified time | relevance | path

Searched refs:CLK_SDMMC1 (Results 1 – 12 of 12) sorted by relevance

/linux-6.1.9/include/dt-bindings/clock/
Dexynos5250.h85 #define CLK_SDMMC1 281 macro
Dexynos4.h136 #define CLK_SDMMC1 298 macro
Dexynos3250.h204 #define CLK_SDMMC1 198 macro
Drk3568-cru.h242 #define CLK_SDMMC1 179 macro
/linux-6.1.9/drivers/clk/samsung/
Dclk-exynos5250.c562 GATE(CLK_SDMMC1, "sdmmc1", "div_aclk200", GATE_IP_FSYS, 13, 0, 0),
Dclk-exynos3250.c644 GATE(CLK_SDMMC1, "sdmmc1", "div_aclk_200", GATE_IP_FSYS, 6, 0, 0),
Dclk-exynos4.c841 GATE(CLK_SDMMC1, "sdmmc1", "aclk133", GATE_IP_FSYS, 6,
/linux-6.1.9/arch/arm/boot/dts/
Dexynos3250.dtsi395 clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>;
Dexynos4.dtsi332 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
Dexynos5250.dtsi558 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
/linux-6.1.9/drivers/clk/rockchip/
Dclk-rk3568.c896 COMPOSITE_NODIV(CLK_SDMMC1, "clk_sdmmc1", clk_sdmmc_p, 0,
/linux-6.1.9/arch/arm64/boot/dts/rockchip/
Drk356x.dtsi1018 clocks = <&cru HCLK_SDMMC1>, <&cru CLK_SDMMC1>,