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Searched refs:CLK_PWM (Results 1 – 17 of 17) sorted by relevance

/linux-6.1.9/include/dt-bindings/clock/
Dexynos5410.h49 #define CLK_PWM 279 macro
Dexynos5250.h115 #define CLK_PWM 311 macro
Ds5pv210.h155 #define CLK_PWM 137 macro
Dexynos5420.h88 #define CLK_PWM 279 macro
Dexynos4.h174 #define CLK_PWM 336 macro
Dexynos3250.h208 #define CLK_PWM 202 macro
/linux-6.1.9/drivers/clk/samsung/
Dclk-exynos5410.c210 GATE(CLK_PWM, "pwm", "aclk66", GATE_IP_PERIC, 24, 0, 0),
Dclk-s5pv210.c571 GATE(CLK_PWM, "pwm", "dout_pclkp", CLK_GATE_IP3, 23, 0, 0),
Dclk-exynos5250.c595 GATE(CLK_PWM, "pwm", "div_aclk66", GATE_IP_PERIC, 24, 0, 0),
Dclk-exynos3250.c650 GATE(CLK_PWM, "pwm", "div_aclk_100", GATE_IP_PERIL, 24, 0, 0),
Dclk-exynos4.c750 GATE(CLK_PWM, "pwm", "aclk100", GATE_IP_PERIL, 24, 0, 0),
Dclk-exynos5420.c1093 GATE(CLK_PWM, "pwm", "mout_user_aclk66_peric",
/linux-6.1.9/arch/arm/boot/dts/
Dexynos5410.dtsi329 clocks = <&clock CLK_PWM>;
Ds5pv210.dtsi289 clocks = <&clocks CLK_PWM>;
Dexynos4.dtsi666 clocks = <&clock CLK_PWM>;
Dexynos5250.dtsi1181 clocks = <&clock CLK_PWM>;
Dexynos5420.dtsi1304 clocks = <&clock CLK_PWM>;