Searched refs:CLK_PLL (Results 1 – 4 of 4) sorted by relevance
/linux-6.1.9/drivers/clk/renesas/ |
D | r7s9210-cpg-mssr.c | 51 CLK_PLL, enumerator 63 DEF_BASE(".pll", CLK_PLL, CLK_TYPE_RZA_PLL, CLK_MAIN), 66 DEF_FIXED("p1c", R7S9210_CLK_P1C, CLK_PLL, 16, 1), 77 DEF_FIXED("i", R7S9210_CLK_I, CLK_PLL, 2, 1), 78 DEF_FIXED("g", R7S9210_CLK_G, CLK_PLL, 4, 1), 79 DEF_FIXED("b", R7S9210_CLK_B, CLK_PLL, 8, 1), 80 DEF_FIXED("p1", R7S9210_CLK_P1, CLK_PLL, 16, 1), 81 DEF_FIXED("p0", R7S9210_CLK_P0, CLK_PLL, 32, 1), 177 case CLK_PLL: in rza2_cpg_clk_register()
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/linux-6.1.9/drivers/clk/ |
D | clk-bm1880.c | 174 #define CLK_PLL(_id, _name, _parent, _reg, _flags) { \ macro 206 CLK_PLL(BM1880_CLK_MPLL, "clk_mpll", bm1880_pll_parent, 208 CLK_PLL(BM1880_CLK_SPLL, "clk_spll", bm1880_pll_parent, 210 CLK_PLL(BM1880_CLK_FPLL, "clk_fpll", bm1880_pll_parent, 212 CLK_PLL(BM1880_CLK_DDRPLL, "clk_ddrpll", bm1880_pll_parent,
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/linux-6.1.9/drivers/staging/media/deprecated/stkwebcam/ |
D | stk-sensor.c | 99 #define CLK_PLL 0x80 /* Enable internal PLL */ macro 301 {REG_CLKRC, CLK_PLL},
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/linux-6.1.9/drivers/clk/microchip/ |
D | clk-mpfs.c | 172 #define CLK_PLL(_id, _name, _parent, _shift, _width, _flags, _offset) { \ macro 182 CLK_PLL(CLK_MSSPLL, "clk_msspll", mpfs_ext_ref, MSSPLL_FBDIV_SHIFT,
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