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Searched refs:CLK_INFRA_UART0_SEL (Results 1 – 3 of 3) sorted by relevance

/linux-6.1.9/include/dt-bindings/clock/
Dmt7986-clk.h91 #define CLK_INFRA_UART0_SEL 1 macro
/linux-6.1.9/arch/arm64/boot/dts/mediatek/
Dmt7986a.dtsi191 clocks = <&infracfg CLK_INFRA_UART0_SEL>,
195 <&infracfg CLK_INFRA_UART0_SEL>;
/linux-6.1.9/drivers/clk/mediatek/
Dclk-mt7986-infracfg.c42 MUX_GATE_CLR_SET_UPD(CLK_INFRA_UART0_SEL, "infra_uart0_sel",