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Searched refs:CLK_GSCL_WA (Results 1 – 4 of 4) sorted by relevance

/linux-6.1.9/include/dt-bindings/clock/
Dexynos5250.h64 #define CLK_GSCL_WA 260 macro
Dexynos5420.h162 #define CLK_GSCL_WA 463 macro
/linux-6.1.9/drivers/clk/samsung/
Dclk-exynos5250.c525 GATE(CLK_GSCL_WA, "gscl_wa", "div_gscl_wa", GATE_IP_GSCL, 5, 0, 0),
Dclk-exynos5420.c1165 GATE(CLK_GSCL_WA, "gscl_wa", "sclk_gscl_wa", GATE_IP_GSCL1, 12,