Searched refs:CLK_DIV_GDL (Results 1 – 8 of 8) sorted by relevance
/linux-6.1.9/include/dt-bindings/clock/ |
D | exynos4.h | 238 #define CLK_DIV_GDL 459 macro
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D | exynos3250.h | 84 #define CLK_DIV_GDL 65 macro
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/linux-6.1.9/Documentation/devicetree/bindings/interconnect/ |
D | samsung,exynos-bus.yaml | 244 clocks = <&cmu CLK_DIV_GDL>; 273 clocks = <&clock CLK_DIV_GDL>;
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/linux-6.1.9/arch/arm/boot/dts/ |
D | exynos4210.dtsi | 268 clocks = <&clock CLK_DIV_GDL>;
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D | exynos4412.dtsi | 468 clocks = <&clock CLK_DIV_GDL>;
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D | exynos3250.dtsi | 810 clocks = <&cmu CLK_DIV_GDL>;
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/linux-6.1.9/drivers/clk/samsung/ |
D | clk-exynos3250.c | 337 DIV(CLK_DIV_GDL, "div_gdl", "mout_gdl", DIV_LEFTBUS, 0, 4),
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D | clk-exynos4.c | 590 DIV(CLK_DIV_GDL, "div_gdl", "mout_gdl", DIV_LEFTBUS, 0, 3),
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