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Searched refs:CLKREQB_PAD_CNTL__CLKREQB_PAD_SN1__SHIFT (Results 1 – 10 of 10) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/bif/
Dbif_3_0_sh_mask.h367 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN1__SHIFT 0x00000006 macro
Dbif_4_1_sh_mask.h238 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN1__SHIFT 0x6 macro
Dbif_5_0_sh_mask.h276 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN1__SHIFT 0x6 macro
Dbif_5_1_sh_mask.h240 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN1__SHIFT 0x6 macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/nbif/
Dnbif_6_1_sh_mask.h2292 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN1__SHIFT … macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_4_sh_mask.h20342 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN1__SHIFT … macro
Dnbio_4_3_0_sh_mask.h17335 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN1__SHIFT … macro
Dnbio_2_3_sh_mask.h1572 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN1__SHIFT … macro
Dnbio_7_0_sh_mask.h117767 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN1__SHIFT … macro
Dnbio_6_1_sh_mask.h17491 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN1__SHIFT … macro