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Searched refs:CLKID_VCLK2_DIV2 (Results 1 – 8 of 8) sorted by relevance

/linux-6.1.9/include/dt-bindings/clock/
Daxg-clkc.h93 #define CLKID_VCLK2_DIV2 128 macro
Dgxbb-clkc.h140 #define CLKID_VCLK2_DIV2 191 macro
Dg12a-clkc.h119 #define CLKID_VCLK2_DIV2 154 macro
/linux-6.1.9/drivers/clk/meson/
Dmeson8b.h138 #define CLKID_VCLK2_DIV2 153 macro
Dmeson8b.c2928 [CLKID_VCLK2_DIV2] = &meson8b_vclk2_div2_div_gate.hw,
3136 [CLKID_VCLK2_DIV2] = &meson8b_vclk2_div2_div_gate.hw,
3355 [CLKID_VCLK2_DIV2] = &meson8b_vclk2_div2_div_gate.hw,
Dgxbb.c2920 [CLKID_VCLK2_DIV2] = &gxbb_vclk2_div2.hw,
3131 [CLKID_VCLK2_DIV2] = &gxbb_vclk2_div2.hw,
Dg12a.c4403 [CLKID_VCLK2_DIV2] = &g12a_vclk2_div2.hw,
4632 [CLKID_VCLK2_DIV2] = &g12a_vclk2_div2.hw,
4896 [CLKID_VCLK2_DIV2] = &g12a_vclk2_div2.hw,
Daxg.c2022 [CLKID_VCLK2_DIV2] = &axg_vclk2_div2.hw,