Home
last modified time | relevance | path

Searched refs:CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK (Results 1 – 6 of 6) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dfiji_baco.c67 { CMD_WAITFOR, mmGCK_SMC_IND_DATA, CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK, 0, 0xffffffff, 0x2 },
72 { CMD_WAITFOR, mmGCK_SMC_IND_DATA, CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK, 0, 0xffffffff, 0x2 },
Dci_baco.c69 { CMD_WAITFOR, mmGCK_SMC_IND_DATA, CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK, 0, 0xffffffff, 0x2 },
74 { CMD_WAITFOR, mmGCK_SMC_IND_DATA, CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK, 0, 0xffffffff, 0x2 },
Dtonga_baco.c67 { CMD_WAITFOR, mmGCK_SMC_IND_DATA, CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK, 0, 0xffffffff, 0x2 },
72 { CMD_WAITFOR, mmGCK_SMC_IND_DATA, CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK, 0, 0xffffffff, 0x2 },
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/smu/
Dsmu_7_0_1_sh_mask.h197 #define CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK 0x2 macro
Dsmu_7_1_2_sh_mask.h197 #define CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK 0x2 macro
Dsmu_7_1_3_sh_mask.h223 #define CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK 0x2 macro