Searched refs:CFGCHIP (Results 1 – 5 of 5) sorted by relevance
| /linux-6.1.9/drivers/phy/ti/ |
| D | phy-da8xx-usb.c | 39 regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_USB1SUSPENDM, in da8xx_usb11_phy_power_on()
49 regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_USB1SUSPENDM, 0); in da8xx_usb11_phy_power_off()
71 regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_OTGPWRDN, 0); in da8xx_usb20_phy_power_on()
80 regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_OTGPWRDN, in da8xx_usb20_phy_power_off()
108 regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_OTGMODE_MASK, in da8xx_usb20_phy_set_mode()
208 regmap_write_bits(d_phy->regmap, CFGCHIP(2), in da8xx_usb_phy_probe()
|
| /linux-6.1.9/drivers/clk/davinci/ |
| D | da8xx-cfgchip.c | 130 .cfgchip = CFGCHIP(1),
152 .cfgchip = CFGCHIP(3),
272 .cfgchip = CFGCHIP(3),
294 .cfgchip = CFGCHIP(3),
390 regmap_write_bits(usb0->regmap, CFGCHIP(2), mask, val); in da8xx_usb0_clk48_enable()
391 ret = regmap_read_poll_timeout(usb0->regmap, CFGCHIP(2), val, in da8xx_usb0_clk48_enable()
405 regmap_write_bits(usb0->regmap, CFGCHIP(2), val, val); in da8xx_usb0_clk48_disable()
413 regmap_read(usb0->regmap, CFGCHIP(2), &val); in da8xx_usb0_clk48_is_enabled()
458 regmap_write_bits(usb0->regmap, CFGCHIP(2), mask, val); in da8xx_usb0_clk48_recalc_rate()
474 return regmap_write_bits(usb0->regmap, CFGCHIP(2), in da8xx_usb0_clk48_set_parent()
[all …]
|
| D | pll-da850.c | 31 .unlock_reg = CFGCHIP(0),
162 .unlock_reg = CFGCHIP(3),
|
| /linux-6.1.9/Documentation/devicetree/bindings/clock/ti/davinci/ |
| D | da8xx-cfgchip.txt | 1 Binding for TI DA8XX/OMAP-L13X/AM17XX/AM18XX CFGCHIP clocks
7 All of the clock nodes described below must be child nodes of a CFGCHIP node
|
| /linux-6.1.9/include/linux/mfd/ |
| D | da8xx-cfgchip.h | 14 #define CFGCHIP(n) ((n) * 4) macro
|