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Searched refs:CDCLK_FREQ_SEL_MASK (Results 1 – 2 of 2) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/i915/display/
Dintel_cdclk.c931 switch (cdctl & CDCLK_FREQ_SEL_MASK) { in skl_get_cdclk()
945 MISSING_CASE(cdctl & CDCLK_FREQ_SEL_MASK); in skl_get_cdclk()
949 switch (cdctl & CDCLK_FREQ_SEL_MASK) { in skl_get_cdclk()
963 MISSING_CASE(cdctl & CDCLK_FREQ_SEL_MASK); in skl_get_cdclk()
1109 cdclk_ctl &= ~(CDCLK_FREQ_SEL_MASK | CDCLK_FREQ_DECIMAL_MASK); in skl_set_cdclk()
1123 cdclk_ctl &= ~(CDCLK_FREQ_SEL_MASK | CDCLK_FREQ_DECIMAL_MASK); in skl_set_cdclk()
1168 expected = (cdctl & CDCLK_FREQ_SEL_MASK) | in skl_sanitize_cdclk()
/linux-6.1.9/drivers/gpu/drm/i915/
Di915_reg.h7130 #define CDCLK_FREQ_SEL_MASK REG_GENMASK(27, 26) macro
7131 #define CDCLK_FREQ_450_432 REG_FIELD_PREP(CDCLK_FREQ_SEL_MASK, 0)
7132 #define CDCLK_FREQ_540 REG_FIELD_PREP(CDCLK_FREQ_SEL_MASK, 1)
7133 #define CDCLK_FREQ_337_308 REG_FIELD_PREP(CDCLK_FREQ_SEL_MASK, 2)
7134 #define CDCLK_FREQ_675_617 REG_FIELD_PREP(CDCLK_FREQ_SEL_MASK, 3)