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Searched refs:CCID (Results 1 – 9 of 9) sorted by relevance

/linux-6.1.9/net/dccp/ccids/
DKconfig5 bool "CCID-2 debugging messages"
7 Enable CCID-2 specific debugging messages.
15 bool "CCID-3 (TCP-Friendly)"
18 CCID-3 denotes TCP-Friendly Rate Control (TFRC), an equation-based
24 throughput over time compared with TCP, which makes CCID-3 more
25 suitable than CCID-2 for applications such streaming media where a
28 CCID-3 is further described in RFC 4342,
40 bool "CCID-3 debugging messages"
43 Enable CCID-3 specific debugging messages.
/linux-6.1.9/Documentation/networking/
Ddccp.rst24 modules called CCIDs. Like pluggable TCP congestion control, at least one CCID
28 For a brief introduction to CCIDs and suggestions for choosing a CCID to match
94 type of CCID for both directions; and mixed use of CCIDs is not currently well
99 DCCP_SOCKOPT_TX_CCID is read/write. It returns the current CCID (if set) or sets
100 the preference list for the TX CCID, using the same format as DCCP_SOCKOPT_CCID.
103 DCCP_SOCKOPT_RX_CCID is analogous to DCCP_SOCKOPT_TX_CCID, but for the RX CCID.
129 The following two options apply to CCID 3 exclusively and are getsockopt()-only.
168 Default CCID for the sender-receiver half-connection. Depending on the
169 choice of CCID, the Send Ack Vector feature is enabled automatically.
172 Default CCID for the receiver-sender half-connection; see tx_ccid.
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/linux-6.1.9/drivers/char/pcmcia/
DKconfig41 This card is basically a USB CCID device connected to a FIFO
/linux-6.1.9/drivers/gpu/drm/i915/gt/
Dintel_engine_regs.h115 #define CCID(base) _MMIO((base) + 0x180) macro
Dintel_engine_cs.c1914 drm_printf(m, "\tCCID: 0x%08x\n", ENGINE_READ(engine, CCID)); in intel_engine_print_registers()
/linux-6.1.9/drivers/gpu/drm/i915/gt/uc/
Dintel_guc_capture.c57 { CCID(0), 0, 0, "CCID" }, \
/linux-6.1.9/drivers/gpu/drm/i915/
Dintel_gvt_mmio_table.c66 MMIO_D(CCID(RENDER_RING_BASE)); in iterate_generic_mmio()
Di915_gpu_error.c1241 ee->ccid = ENGINE_READ(engine, CCID); in engine_record_registers()
/linux-6.1.9/drivers/gpu/drm/i915/gvt/
Dhandlers.c2209 MMIO_GM_RDR(CCID(RENDER_RING_BASE), D_ALL, NULL, NULL); in init_generic_mmio_info()