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Searched refs:CACHE_FLUSH_AND_INV_EVENT (Results 1 – 13 of 13) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/radeon/
Dnid.h518 # define CACHE_FLUSH_AND_INV_EVENT (0x16 << 0) macro
Dsid.h1392 # define CACHE_FLUSH_AND_INV_EVENT (22 << 0) macro
Dcikd.h1581 # define CACHE_FLUSH_AND_INV_EVENT (22 << 0) macro
Dr600d.h571 # define CACHE_FLUSH_AND_INV_EVENT (0x16 << 0) macro
Dr600.c2900 radeon_ring_write(ring, EVENT_TYPE(CACHE_FLUSH_AND_INV_EVENT) | EVENT_INDEX(0)); in r600_fence_ring_emit()
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dsid.h1455 # define CACHE_FLUSH_AND_INV_EVENT (22 << 0) macro
/linux-6.1.9/drivers/gpu/drm/msm/adreno/
Dadreno_pm4.xml.h72 CACHE_FLUSH_AND_INV_EVENT = 22, enumerator
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_enum.h4796 CACHE_FLUSH_AND_INV_EVENT = 0x16, enumerator
Dgfx_8_0_enum.h5279 CACHE_FLUSH_AND_INV_EVENT = 0x16, enumerator
Dgfx_8_1_enum.h5348 CACHE_FLUSH_AND_INV_EVENT = 0x16, enumerator
/linux-6.1.9/drivers/gpu/drm/amd/include/
Dvega10_enum.h15468 CACHE_FLUSH_AND_INV_EVENT = 0x00000016, enumerator
Dnavi10_enum.h14178 CACHE_FLUSH_AND_INV_EVENT = 0x00000016, enumerator
Dsoc21_enum.h16842 CACHE_FLUSH_AND_INV_EVENT = 0x00000016, enumerator