/linux-6.1.9/Documentation/devicetree/bindings/phy/ |
D | microchip,sparx5-serdes.yaml | 34 * 100 Mbps (100BASE-FX) 35 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX) 44 * 100 Mbps (100BASE-FX) 45 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX) 57 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
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/linux-6.1.9/Documentation/driver-api/media/drivers/ |
D | radiotrack.rst | 129 Default: BASE <-- 0xc8 (current volume, no stereo detect, 132 Card Off: BASE <-- 0x00 (audio mute, no stereo detect, 135 Card On: BASE <-- 0x00 (see "Card Off", clears any unfinished business) 136 BASE <-- 0xc8 (see "Default") 138 Volume Down: BASE <-- 0x48 (volume down, no stereo detect, 141 BASE <-- 0xc8 (see "Default") 143 Volume Up: BASE <-- 0x88 (volume up, no stereo detect, 146 BASE <-- 0xc8 (see "Default") 148 Check Stereo: BASE <-- 0xd8 (current volume, stereo detect, 151 x <-- BASE (read ioport) [all …]
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/linux-6.1.9/tools/testing/selftests/net/ |
D | udpgro_fwd.sh | 5 readonly BASE="ns-$(mktemp -u XXXXXX)" 9 readonly NS_SRC=$BASE$SRC 10 readonly NS_DST=$BASE$DST 45 ip link set dev veth$ns netns $BASE$ns 46 ip -n $BASE$ns link set dev veth$ns up 47 ip -n $BASE$ns addr add dev veth$ns $BM_NET_V4$ns/24 48 ip -n $BASE$ns addr add dev veth$ns $BM_NET_V6$ns/64 nodad 74 create_vxlan_endpoint $BASE$ns veth$ns $BM_NET_V4$((3 - $ns)) vxlan$ns 4 75 ip -n $BASE$ns addr add dev vxlan$ns $OL_NET_V4$ns/24 78 create_vxlan_endpoint $BASE$ns veth$ns $BM_NET_V6$((3 - $ns)) vxlan6$ns 6 [all …]
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D | veth.sh | 6 readonly BASE=`basename $STATS` 10 readonly NS_SRC=$BASE$SRC 11 readonly NS_DST=$BASE$DST 45 ip link set dev veth$ns netns $BASE$ns up 46 ip -n $BASE$ns addr add dev veth$ns $BM_NET_V4$ns/24 47 ip -n $BASE$ns addr add dev veth$ns $BM_NET_V6$ns/64 nodad 49 echo "#kernel" > $BASE 50 chmod go-rw $BASE 59 local flag=`ip netns exec $BASE$target ethtool -k veth$target |\ 87 local cur_rx=`ip netns exec $BASE$target ethtool -l $dev |\ [all …]
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/linux-6.1.9/Documentation/devicetree/bindings/net/ |
D | ti,dp83869.yaml | 18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and 19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and 20 100BASE-FX Fiber protocols. 23 the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX
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/linux-6.1.9/drivers/media/pci/cobalt/ |
D | cobalt-omnitek.c | 42 #define BASE (cobalt->bar0) macro 43 #define CAPABILITY_HEADER (BASE) 44 #define CAPABILITY_REGISTER (BASE + 0x04) 47 #define INTERRUPT_STATUS (BASE + 0x08) 48 #define PCI(c) (BASE + 0x40 + ((c) * 0x40)) 49 #define SIZE(c) (BASE + 0x58 + ((c) * 0x40)) 50 #define DESCRIPTOR(c) (BASE + 0x50 + ((c) * 0x40)) 51 #define CS_REG(c) (BASE + 0x60 + ((c) * 0x40)) 52 #define BYTES_TRANSFERRED(c) (BASE + 0x64 + ((c) * 0x40))
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/linux-6.1.9/fs/xfs/libxfs/ |
D | xfs_da_btree.h | 163 #define XFS_DA_LOGOFF(BASE, ADDR) ((char *)(ADDR) - (char *)(BASE)) argument 164 #define XFS_DA_LOGRANGE(BASE, ADDR, SIZE) \ argument 165 (uint)(XFS_DA_LOGOFF(BASE, ADDR)), \ 166 (uint)(XFS_DA_LOGOFF(BASE, ADDR)+(SIZE)-1)
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/linux-6.1.9/tools/testing/selftests/gpio/ |
D | gpio-mockup.sh | 9 BASE=${0%/*} 106 $BASE/gpio-mockup-cdev $cdev_opts /dev/$chip $offset 150 $BASE/gpio-mockup-cdev $cdev_opts -s$val /dev/$chip $offset & 158 $BASE/gpio-mockup-cdev $cdev_opts /dev/$chip $offset || true 343 source $BASE/gpio-mockup-sysfs.sh
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/linux-6.1.9/include/linux/ |
D | zutil.h | 53 #define BASE 65521L /* largest prime smaller than 65536 */ macro 100 s1 %= BASE; in zlib_adler32() 101 s2 %= BASE; in zlib_adler32()
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/linux-6.1.9/tools/perf/tests/shell/ |
D | daemon.sh | 152 base=BASE 202 base=BASE 227 base=BASE 261 base=BASE 321 base=BASE 373 base=BASE 412 base=BASE 451 base=BASE
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/linux-6.1.9/arch/sparc/net/ |
D | bpf_jit_comp_32.c | 181 #define emit_loadptr(BASE, STRUCT, FIELD, DEST) \ argument 184 *prog++ = LDPTRI | RS1(BASE) | S13(_off) | RD(DEST); \ 187 #define emit_load32(BASE, STRUCT, FIELD, DEST) \ argument 190 *prog++ = LD32I | RS1(BASE) | S13(_off) | RD(DEST); \ 193 #define emit_load16(BASE, STRUCT, FIELD, DEST) \ argument 196 *prog++ = LD16I | RS1(BASE) | S13(_off) | RD(DEST); \ 199 #define __emit_load8(BASE, STRUCT, FIELD, DEST) \ argument 201 *prog++ = LD8I | RS1(BASE) | S13(_off) | RD(DEST); \ 204 #define emit_load8(BASE, STRUCT, FIELD, DEST) \ argument 206 __emit_load8(BASE, STRUCT, FIELD, DEST); \ [all …]
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
D | hw_factory_dce120.c | 57 #define BASE(seg) \ macro 61 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 64 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
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D | hw_translate_dce120.c | 48 #define BASE(seg) \ macro 52 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 55 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
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/linux-6.1.9/drivers/media/tuners/ |
D | xc2028-types.h | 14 #define BASE (1<<0) macro 15 #define BASE_TYPES (BASE|F8MHZ|MTS|FM|INPUT1|INPUT2|INIT1)
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D | xc4000.c | 552 if (type & BASE) in dump_firm_type_and_int_freq() 641 & (BASE | INIT1 | FM | DTV6 | DTV7 | DTV78 | DTV8 | SCODE)) in seek_firmware() 960 if (priv->cur_fw.type & BASE) { in check_firmware() 975 rc = load_firmware(fe, BASE, &std0); in check_firmware() 984 rc = load_firmware(fe, BASE | INIT1, &std0); in check_firmware() 986 rc = load_firmware(fe, BASE | INIT1, &std0); in check_firmware() 998 if (priv->cur_fw.type == (BASE | new_fw.type) && in check_firmware() 1070 priv->cur_fw.type |= BASE; in check_firmware() 1523 & (BASE | FM | DTV6 | DTV7 | DTV78 | DTV8)) == BASE) { in xc4000_get_frequency() 1556 if (priv->cur_fw.type & BASE) in xc4000_get_status() [all …]
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
D | hw_factory_dcn10.c | 54 #define BASE(seg) \ macro 58 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 61 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
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D | hw_translate_dcn10.c | 48 #define BASE(seg) \ macro 52 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 55 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/gpio/dcn21/ |
D | hw_factory_dcn21.c | 53 #define BASE(seg) BASE_INNER(seg) macro 58 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 64 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
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/linux-6.1.9/drivers/ps3/ |
D | ps3av_cmd.c | 489 #define BASE PS3AV_CMD_AUDIO_FS_44K macro 493 [PS3AV_CMD_AUDIO_FS_44K-BASE] = { 6272, 6272, 17836, 17836, 8918 }, 494 [PS3AV_CMD_AUDIO_FS_48K-BASE] = { 6144, 6144, 11648, 11648, 5824 }, 495 [PS3AV_CMD_AUDIO_FS_88K-BASE] = { 12544, 12544, 35672, 35672, 17836 }, 496 [PS3AV_CMD_AUDIO_FS_96K-BASE] = { 12288, 12288, 23296, 23296, 11648 }, 497 [PS3AV_CMD_AUDIO_FS_176K-BASE] = { 25088, 25088, 71344, 71344, 35672 }, 498 [PS3AV_CMD_AUDIO_FS_192K-BASE] = { 24576, 24576, 46592, 46592, 23296 } 540 ns_val = ps3av_ns_table[PS3AV_CMD_AUDIO_FS_44K-BASE][d]; in ps3av_cnv_ns() 547 #undef BASE
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
D | hw_factory_dcn20.c | 55 #define BASE(seg) BASE_INNER(seg) macro 60 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 66 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/gpio/dcn30/ |
D | hw_factory_dcn30.c | 62 #define BASE(seg) BASE_INNER(seg) macro 67 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 73 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/gpio/dcn315/ |
D | hw_factory_dcn315.c | 59 #define BASE(seg) BASE_INNER(seg) macro 64 BASE(reg ## reg_name ## _BASE_IDX) + reg ## reg_name 70 BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/gpio/dcn32/ |
D | hw_factory_dcn32.c | 55 #define BASE(seg) BASE_INNER(seg) macro 60 BASE(reg ## reg_name ## _BASE_IDX) + reg ## reg_name 66 BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn321/ |
D | dcn321_resource.c | 116 #define BASE(seg) BASE_INNER(seg) macro 119 REG_STRUCT.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \ 122 REG_STRUCT[id].reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \ 128 REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 132 REG_STRUCT[id].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 136 REG_STRUCT[id-1].reg_name = BASE(reg##reg_name##_BASE_IDX) + reg##reg_name 139 REG_STRUCT[id-1].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 143 REG_STRUCT[index].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 147 .reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \ 150 REG_STRUCT[id].reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \ [all …]
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/ |
D | dcn10_dwb.h | 33 #define BASE(seg) \ macro 37 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ 41 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 46 .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
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