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Searched refs:AUX_DPHY_RX_CONTROL1 (Results 1 – 6 of 6) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce/
Ddce_link_encoder.h42 SRI(AUX_DPHY_RX_CONTROL1, DP_AUX, id)
139 uint32_t AUX_DPHY_RX_CONTROL1; member
Ddce_aux.h40 SRI(AUX_DPHY_RX_CONTROL1, DP_AUX, id), \
59 uint32_t AUX_DPHY_RX_CONTROL1; member
Ddce_aux.c477 …REG_GET_2(AUX_DPHY_RX_CONTROL1, AUX_RX_TIMEOUT_LEN, &prev_length, AUX_RX_TIMEOUT_LEN_MUL, &prev_mu… in dce_aux_configure_timeout()
497 …REG_UPDATE_SEQ_2(AUX_DPHY_RX_CONTROL1, AUX_RX_TIMEOUT_LEN, length, AUX_RX_TIMEOUT_LEN_MUL, multipl… in dce_aux_configure_timeout()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_link_encoder.h37 SRI(AUX_DPHY_RX_CONTROL1, DP_AUX, id)
77 uint32_t AUX_DPHY_RX_CONTROL1; member
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_link_encoder.c340 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL1, enc->ctx->dc_bios->golden_table.aux_dphy_rx_control1_val); in enc2_hw_init()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_resource.h279 SRI_ARR(AUX_DPHY_RX_CONTROL1, DP_AUX, id) \
554 SRI_ARR(AUX_DPHY_RX_CONTROL1, DP_AUX, id), \