Searched refs:AR_SM_BASE (Results 1 – 2 of 2) sorted by relevance
451 #define AR_SM_BASE 0xa200 macro453 #define AR_PHY_D2_CHIP_ID (AR_SM_BASE + 0x0)454 #define AR_PHY_GEN_CTRL (AR_SM_BASE + 0x4)455 #define AR_PHY_MODE (AR_SM_BASE + 0x8)456 #define AR_PHY_ACTIVE (AR_SM_BASE + 0xc)457 #define AR_PHY_SPUR_MASK_A (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x18 : 0x20))458 #define AR_PHY_SPUR_MASK_B (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x1c : 0x24))459 #define AR_PHY_SPECTRAL_SCAN (AR_SM_BASE + 0x28)460 #define AR_PHY_RADAR_BW_FILTER (AR_SM_BASE + 0x2c)461 #define AR_PHY_SEARCH_START_DELAY (AR_SM_BASE + 0x30)[all …]
20 #define AR_SM_BASE 0xa200 macro24 #define AR_PHY_AIC_CTRL_0_B0 (AR_SM_BASE + 0x4b0)25 #define AR_PHY_AIC_CTRL_1_B0 (AR_SM_BASE + 0x4b4)26 #define AR_PHY_AIC_CTRL_2_B0 (AR_SM_BASE + 0x4b8)27 #define AR_PHY_AIC_CTRL_3_B0 (AR_SM_BASE + 0x4bc)28 #define AR_PHY_AIC_CTRL_4_B0 (AR_SM_BASE + 0x4c0)30 #define AR_PHY_AIC_STAT_0_B0 (AR_SM_BASE + 0x4c4)31 #define AR_PHY_AIC_STAT_1_B0 (AR_SM_BASE + 0x4c8)32 #define AR_PHY_AIC_STAT_2_B0 (AR_SM_BASE + 0x4cc)42 #define AR_PHY_AIC_SRAM_ADDR_B0 (AR_SM_BASE + 0x5f0)[all …]