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Searched refs:AR_PHY_MULTICHAIN_GAIN_CTL (Results 1 – 3 of 3) sorted by relevance

/linux-6.1.9/drivers/net/wireless/ath/ath9k/
Dar9002_phy.c383 regval = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); in ar9002_hw_antdiv_comb_conf_get()
400 regval = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); in ar9002_hw_antdiv_comb_conf_set()
411 REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regval); in ar9002_hw_antdiv_comb_conf_set()
455 regval = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); in ar9002_hw_set_bt_ant_diversity()
467 REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regval); in ar9002_hw_set_bt_ant_diversity()
Deeprom_4k.c782 regVal = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); in ath9k_hw_4k_set_board_values()
797 REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regVal); in ath9k_hw_4k_set_board_values()
798 regVal = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); in ath9k_hw_4k_set_board_values()
812 regVal = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); in ath9k_hw_4k_set_board_values()
822 REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regVal); in ath9k_hw_4k_set_board_values()
Dar9002_phy.h309 #define AR_PHY_MULTICHAIN_GAIN_CTL 0x99ac macro