/linux-6.1.9/arch/mips/include/asm/mach-ip32/ |
D | kmalloc.h | 7 #define ARCH_DMA_MINALIGN 32 macro 9 #define ARCH_DMA_MINALIGN 128 macro
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/linux-6.1.9/arch/arm64/mm/ |
D | dma-mapping.c | 69 WARN_TAINT(!coherent && cls > ARCH_DMA_MINALIGN, in arch_setup_dma_ops() 73 ARCH_DMA_MINALIGN, cls); in arch_setup_dma_ops()
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/linux-6.1.9/arch/arm64/include/asm/ |
D | cache.h | 26 #define ARCH_DMA_MINALIGN (128) macro 79 return cwg ? 4 << cwg : ARCH_DMA_MINALIGN; in cache_line_size_of_cpu()
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/linux-6.1.9/arch/riscv/mm/ |
D | dma-noncoherent.c | 62 WARN_TAINT(!coherent && riscv_cbom_block_size > ARCH_DMA_MINALIGN, in arch_setup_dma_ops() 66 ARCH_DMA_MINALIGN, riscv_cbom_block_size); in arch_setup_dma_ops()
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/linux-6.1.9/include/linux/ |
D | slab.h | 224 #if defined(ARCH_DMA_MINALIGN) && ARCH_DMA_MINALIGN > 8 225 #define ARCH_KMALLOC_MINALIGN ARCH_DMA_MINALIGN 226 #define KMALLOC_MIN_SIZE ARCH_DMA_MINALIGN 227 #define KMALLOC_SHIFT_LOW ilog2(ARCH_DMA_MINALIGN)
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D | dma-mapping.h | 548 #ifdef ARCH_DMA_MINALIGN in dma_get_cache_alignment() 549 return ARCH_DMA_MINALIGN; in dma_get_cache_alignment()
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/linux-6.1.9/arch/mips/include/asm/mach-n64/ |
D | kmalloc.h | 6 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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/linux-6.1.9/arch/mips/include/asm/mach-generic/ |
D | kmalloc.h | 10 #define ARCH_DMA_MINALIGN 128 macro
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/linux-6.1.9/arch/mips/include/asm/mach-tx49xx/ |
D | kmalloc.h | 5 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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/linux-6.1.9/arch/m68k/include/asm/ |
D | cache.h | 12 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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/linux-6.1.9/arch/riscv/include/asm/ |
D | cache.h | 15 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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/linux-6.1.9/arch/arm/include/asm/ |
D | cache.h | 18 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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/linux-6.1.9/arch/hexagon/include/asm/ |
D | cache.h | 15 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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/linux-6.1.9/arch/nios2/include/asm/ |
D | cache.h | 21 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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/linux-6.1.9/arch/xtensa/include/asm/ |
D | cache.h | 32 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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/linux-6.1.9/arch/csky/include/asm/ |
D | cache.h | 11 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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/linux-6.1.9/arch/powerpc/include/asm/ |
D | page_32.h | 16 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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/linux-6.1.9/arch/parisc/include/asm/ |
D | cache.h | 23 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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/linux-6.1.9/arch/arc/include/asm/ |
D | cache.h | 52 #define ARCH_DMA_MINALIGN SMP_CACHE_BYTES macro
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/linux-6.1.9/arch/microblaze/include/asm/ |
D | page.h | 34 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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/linux-6.1.9/arch/sh/include/asm/ |
D | page.h | 184 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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/linux-6.1.9/Documentation/core-api/ |
D | dma-api-howto.rst | 884 2) ARCH_DMA_MINALIGN 890 ARCH_DMA_MINALIGN must be set so that the memory allocator 894 Note that ARCH_DMA_MINALIGN is about DMA memory alignment
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/linux-6.1.9/arch/arm64/kernel/ |
D | cpufeature.c | 3304 ARCH_DMA_MINALIGN); in setup_cpu_features()
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