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Searched refs:AR5K_REG_WRITE_BITS (Results 1 – 8 of 8) sorted by relevance

/linux-6.1.9/drivers/net/wireless/ath/ath5k/
Dreset.c181 AR5K_REG_WRITE_BITS(ah, AR5K_DCU_GBL_IFS_MISC, in ath5k_hw_init_core_clock()
261 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_RF_CTL2, in ath5k_hw_init_core_clock()
293 AR5K_REG_WRITE_BITS(ah, AR5K_USEC_5211, AR5K_USEC_32, 1); in ath5k_hw_set_sleep_clock()
295 AR5K_REG_WRITE_BITS(ah, AR5K_TSF_PARM, AR5K_TSF_PARM_INC, 61); in ath5k_hw_set_sleep_clock()
317 AR5K_REG_WRITE_BITS(ah, AR5K_PCICFG, in ath5k_hw_set_sleep_clock()
324 AR5K_REG_WRITE_BITS(ah, AR5K_PCICFG, in ath5k_hw_set_sleep_clock()
339 AR5K_REG_WRITE_BITS(ah, AR5K_PCICFG, in ath5k_hw_set_sleep_clock()
367 AR5K_REG_WRITE_BITS(ah, AR5K_TSF_PARM, AR5K_TSF_PARM_INC, 1); in ath5k_hw_set_sleep_clock()
376 AR5K_REG_WRITE_BITS(ah, AR5K_USEC_5211, AR5K_USEC_32, sclock); in ath5k_hw_set_sleep_clock()
870 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_DAG_CCK_CTL, in ath5k_hw_tweak_initval_settings()
[all …]
Dani.c91 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_DESIRED_SIZE, in ath5k_ani_set_noise_immunity_level()
93 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_AGCCOARSE, in ath5k_ani_set_noise_immunity_level()
95 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_AGCCOARSE, in ath5k_ani_set_noise_immunity_level()
97 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG, in ath5k_ani_set_noise_immunity_level()
122 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_OFDM_SELFCORR, in ath5k_ani_set_spur_immunity_level()
144 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG, in ath5k_ani_set_firstep_level()
166 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR, in ath5k_ani_set_ofdm_weak_signal_detection()
168 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR, in ath5k_ani_set_ofdm_weak_signal_detection()
170 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_WEAK_OFDM_HIGH_THR, in ath5k_ani_set_ofdm_weak_signal_detection()
172 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_WEAK_OFDM_HIGH_THR, in ath5k_ani_set_ofdm_weak_signal_detection()
[all …]
Dphy.c337 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_TIMING_3, in ath5k_hw_write_ofdm_timings()
339 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_TIMING_3, in ath5k_hw_write_ofdm_timings()
977 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_FRAME_CTL, in ath5k_hw_rfregs_init()
1830 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_Q_I_COFF, i_coff); in ath5k_hw_rf511x_iq_calibrate()
1831 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_Q_Q_COFF, q_coff); in ath5k_hw_rf511x_iq_calibrate()
1836 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, in ath5k_hw_rf511x_iq_calibrate()
2056 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_BIN_MASK_CTL, in ath5k_hw_set_spur_mitigation_filter()
2075 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_TIMING_8, in ath5k_hw_set_spur_mitigation_filter()
2080 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_TIMING_10, in ath5k_hw_set_spur_mitigation_filter()
2088 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_BIN_MASK_CTL, in ath5k_hw_set_spur_mitigation_filter()
[all …]
Ddma.c479 AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG, in ath5k_hw_update_tx_triglevel()
857 AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG, in ath5k_hw_dma_init()
859 AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG, in ath5k_hw_dma_init()
Dpcu.c334 AR5K_REG_WRITE_BITS(ah, AR5K_TIME_OUT, AR5K_TIME_OUT_ACK, in ath5k_hw_set_ack_timeout()
352 AR5K_REG_WRITE_BITS(ah, AR5K_TIME_OUT, AR5K_TIME_OUT_CTS, in ath5k_hw_set_cts_timeout()
426 AR5K_REG_WRITE_BITS(ah, AR5K_BEACON, AR5K_BEACON_TIM, in ath5k_hw_set_bssid()
Dqcu.c669 AR5K_REG_WRITE_BITS(ah, AR5K_DCU_GBL_IFS_MISC, in ath5k_hw_set_ifs_intervals()
Dinitvals.c1546 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_TPC_RG5, in ath5k_hw_write_initvals()
Dath5k.h124 #define AR5K_REG_WRITE_BITS(ah, _reg, _flags, _val) \ macro