Searched refs:AR5K_DCU_GBL_IFS_SIFS (Results 1 – 3 of 3) sorted by relevance
421 { AR5K_DCU_GBL_IFS_SIFS,701 { AR5K_DCU_GBL_IFS_SIFS,
674 ath5k_hw_reg_write(ah, sifs_clock, AR5K_DCU_GBL_IFS_SIFS); in ath5k_hw_set_ifs_intervals()
775 #define AR5K_DCU_GBL_IFS_SIFS 0x1030 macro