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Searched refs:APBC_SSP3 (Results 1 – 4 of 4) sorted by relevance

/linux-6.1.9/drivers/clk/mmp/
Dclk-of-pxa168.c42 #define APBC_SSP3 0x858 macro
174 …{0, "ssp3_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP3, 4,…
195 …{PXA168_CLK_SSP3, "ssp3_clk", "ssp3_mux", CLK_SET_RATE_PARENT, APBC_SSP3, 0x3, 0x3, 0x0, 0, &ssp3_…
Dclk-pxa168.c33 #define APBC_SSP3 0x858 macro
263 apbc_base + APBC_SSP3, 4, 3, 0, &clk_lock); in pxa168_clk_init()
266 clk = mmp_clk_register_apbc("ssp3", "ssp1_mux", apbc_base + APBC_SSP3, in pxa168_clk_init()
Dclk-mmp2.c40 #define APBC_SSP3 0x5c macro
319 apbc_base + APBC_SSP3, 4, 3, 0, &clk_lock); in mmp2_clk_init()
323 apbc_base + APBC_SSP3, 10, 0, &clk_lock); in mmp2_clk_init()
Dclk-of-mmp2.c46 #define APBC_SSP3 0x5c macro
244 …{0, "ssp3_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP3, 4,…
270 …{MMP2_CLK_SSP3, "ssp3_clk", "ssp3_mux", CLK_SET_RATE_PARENT, APBC_SSP3, 0x7, 0x3, 0x0, 0, &ssp3_lo…