Searched refs:AC97_DIV (Results 1 – 2 of 2) sorted by relevance
132 #define AC97_DIV __REG(0x41340014) /* AC97 clock divisor value register */ macro
33 #define AC97_DIV (0x0014) /* AC97 clock divisor value register */ macro180 ac97_div = readl(clk_regs + AC97_DIV); in clk_pxa3xx_ac97_get_rate()