| /linux-6.1.9/Documentation/admin-guide/device-mapper/ |
| D | dm-raid.rst | 129 A4 A4 A5 A6 A6 A7 A7 A8 A8
145 A3 A4 A4 A5 A6 A5 A6 A7 A8
146 A5 A6 A7 A8 A9 A9 A10 A11 A12
149 A4 A3 A6 A4 A5 A6 A5 A8 A7
150 A6 A5 A9 A7 A8 A10 A9 A12 A11
162 A3 A4 A4 A5 A6 A5 A6 A7 A8
163 A4 A3 A6 A4 A5 A6 A5 A8 A7
164 A5 A6 A7 A8 A9 A9 A10 A11 A12
165 A6 A5 A9 A7 A8 A10 A9 A12 A11
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| /linux-6.1.9/arch/arm64/boot/dts/exynos/ |
| D | exynos7885-jackpotlte.dts | 3 * Samsung Galaxy A8 2018 (jackpotlte/SM-A530F) device tree source
16 model = "Samsung Galaxy A8 (2018)";
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| /linux-6.1.9/Documentation/devicetree/bindings/arm/ |
| D | arm,realview.yaml | 38 - description: ARM RealView Platform Baseboard for Cortex-A8 (HBI-0178,
40 Cortex CPU family, including a Cortex-A8 test chip.
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| D | cpus.yaml | 407 // Example 2 (Cortex-A8 uniprocessor 32-bit system):
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| /linux-6.1.9/arch/arm/mach-versatile/ |
| D | Kconfig | 232 bool "Support RealView(R) Platform Baseboard for Cortex(tm)-A8 platform"
236 Cortex(tm)-A8. This platform has an on-board Cortex-A8 and has
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| /linux-6.1.9/Documentation/devicetree/bindings/pinctrl/ |
| D | aspeed,ast2400-pinctrl.yaml | 82 pins = "A8";
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| /linux-6.1.9/arch/arm/boot/dts/ |
| D | arm-realview-pba8.dts | 27 model = "ARM RealView Platform Baseboard for Cortex-A8";
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| D | aspeed-bmc-opp-zaius.dts | 472 pins = "A8", "C7", "B7", "A7", "D7", "B6", "A6", "E7";
|
| /linux-6.1.9/Documentation/ABI/stable/ |
| D | sysfs-class-tpm | 139 A7 1F 3C A8 D0 12 15 3E CA 0E BD FA 24 CD 33 C6
144 F7 02 71 CF 15 AE 16 DD D1 C1 8E A8 CF 9B 50 7B
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| /linux-6.1.9/Documentation/arm/ |
| D | sunxi.rst | 20 * ARM Cortex-A8 based SoCs
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| /linux-6.1.9/arch/arm64/boot/dts/ti/ |
| D | k3-j7200-som-p0.dtsi | 99 J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (A8) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */
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| /linux-6.1.9/arch/arm/crypto/ |
| D | sha1-armv4-large.S | 50 @ issue Cortex A8 core was measured to process input block in
56 @ Cortex A8 core and in absolute terms ~870 cycles per input block
62 @ improvement on Cortex A8 core and 12.2 cycles per byte.
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| /linux-6.1.9/drivers/pinctrl/aspeed/ |
| D | pinctrl-aspeed-g4.c | 471 #define A8 56 macro
474 SIG_EXPR_LIST_DECL_DUAL(A8, ROMD8, ROM16, ROM16S);
475 SIG_EXPR_LIST_DECL_SINGLE(A8, NCTS6, NCTS6, UART6_DESC);
476 PIN_DECL_2(A8, GPIOH0, ROMD8, NCTS6);
527 FUNC_GROUP_DECL(UART6, A8, C7, B7, A7, D7, B6, A6, E7);
1855 A8, C7, B7, A7, D7, B6, A6, E7, W21, Y22, U19, R22, P18, P19,
1926 ASPEED_PINCTRL_PIN(A8),
2454 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, A8, E7, SCU8C, 23),
2455 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, A8, E7, SCU8C, 23),
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| D | pinctrl-aspeed-g5.c | 1859 #define A8 233 macro
1860 SIG_EXPR_LIST_DECL_SINGLE(A8, USB2AHDN, USB2AH, SIG_DESC_SET(SCU90, 29));
1861 SIG_EXPR_LIST_DECL_SINGLE(A8, USB2ADDN, USB2AD, SIG_DESC_BIT(SCU90, 29, 0));
1862 PIN_DECL_(A8, SIG_EXPR_LIST_PTR(A8, USB2AHDN), SIG_EXPR_LIST_PTR(A8, USB2ADDN));
1864 FUNC_GROUP_DECL(USB2AH, A7, A8);
1865 FUNC_GROUP_DECL(USB2AD, A7, A8);
1921 ASPEED_PINCTRL_PIN(A8),
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| /linux-6.1.9/Documentation/hwmon/ |
| D | k10temp.rst | 20 * AMD Family 12h processors: "Llano" (E2/A4/A6/A8-Series)
|
| /linux-6.1.9/Documentation/devicetree/bindings/arm/samsung/ |
| D | samsung-boards.yaml | 207 - samsung,jackpotlte # Samsung Galaxy A8 (2018)
|
| /linux-6.1.9/arch/arm/mm/ |
| D | proc-v7.S | 497 ldr r10, =0x00000c08 @ Cortex-A8 primary part number
587 @ Cortex-A8 - always needs bpiall switch_mm implementation
|
| /linux-6.1.9/arch/arm/ |
| D | Kconfig | 635 This option enables the workaround for the 430973 Cortex-A8
639 to physical address re-mapping, Cortex-A8 does not recover from the
640 stale interworking branch prediction. This results in Cortex-A8
652 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
666 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
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| /linux-6.1.9/Documentation/block/ |
| D | bfq-iosched.rst | 46 - AMD A8-3850: 250 KIOPS
55 - AMD A8-3850: 200 KIOPS
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| /linux-6.1.9/arch/m68k/fpsp040/ |
| D | bindec.S | 61 | A8. Clr INEX; Force RZ.
|
| /linux-6.1.9/drivers/pinctrl/renesas/ |
| D | pfc-r8a77970.c | 171 #define IP1_3_0 FM(DU_DG4) F_(0, 0) F_(0, 0) FM(A8) FM(FSO_CFE_0_N_A) F_(0, 0) F_(0, 0) F_(0, …
427 PINMUX_IPSR_GPSR(IP1_3_0, A8),
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| D | pfc-r8a77980.c | 204 #define IP1_3_0 FM(DU_DG4) FM(SCL5) F_(0, 0) FM(A8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,…
501 PINMUX_IPSR_GPSR(IP1_3_0, A8),
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| D | pfc-r8a77990.c | 101 #define GPSR1_8 F_(A8, IP3_31_28)
244 #define IP3_31_28 FM(A8) FM(SDA6_A) FM(RX3_B) FM(HRX4_C) FM(VI5_HSYNC_N_A) FM(DU_HSYNC) FM(VI4…
719 PINMUX_IPSR_GPSR(IP3_31_28, A8),
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| D | pfc-sh7734.c | 630 PINMUX_IPSR_GPSR(IP0_17_16, A8),
1380 GPIO_FN(A8), GPIO_FN(ST0_D4), GPIO_FN(LCD_DATA8_A),
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| /linux-6.1.9/Documentation/driver-api/ |
| D | pin-control.rst | 65 PINCTRL_PIN(0, "A8"),
436 In this 8x8 BGA package the pins { A8, A7, A6, A5 } can be used as an SPI port
486 The Function spi is associated with pin groups { A8, A7, A6, A5 }
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