Searched refs:A7 (Results 1 – 25 of 94) sorted by relevance
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| /linux-6.1.9/arch/arm/boot/dts/ |
| D | vexpress-v2p-ca15_a7.dts | 275 /* A7 PLL 0 reference clock */
284 /* A7 PLL 1 reference clock */
349 /* A7 CPU core voltage */
352 regulator-name = "A7 Vcore";
356 label = "A7 Vcore";
367 /* Total current for the three A7 cores */
370 label = "A7 Icore";
388 /* Total power for the three A7 cores */
391 label = "A7 Pcore";
402 /* Total energy for the three A7 cores */
[all …]
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| D | aspeed-bmc-qcom-dc-scm-v1.dts | 95 /*A0-A7*/ "","","","","","","","",
130 /*A0-A7*/ "GPI_1_BMC_1V8","","","","","",
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| D | aspeed-bmc-vegman-n110.dts | 15 …/*A0-A7*/ "CHASSIS_INTRUSION","CASE_OPEN_FAULT_RST","","","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","…
52 …/*A0-A7*/ "CPU1_PRESENCE","","CPU1_THERMTRIP","","CPU1_VRHOT","","CPU1_FIVR_FAULT","","CPU1_MEM_AB…
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| D | exynos5422-cpus.dtsi | 8 * This file provides desired ordering for Exynos5422: CPU[0123] being the A7.
16 * from the LITTLE: Cortex-A7.
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| D | aspeed-bmc-vegman-sx20.dts | 15 …/*A0-A7*/ "CHASSIS_INTRUSION","CASE_OPEN_FAULT_RST","","","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","…
52 …/*A0-A7*/ "CPU1_PRESENCE","","CPU1_THERMTRIP","","CPU1_VRHOT","","CPU1_FIVR_FAULT","","CPU1_MEM_AB…
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| D | exynos5422-odroidxu3.dts | 48 /* A7 cluster: VDD_KFC */
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| /linux-6.1.9/Documentation/arm/ |
| D | sunxi.rst | 47 * Single ARM Cortex-A7 based SoCs
54 * Dual ARM Cortex-A7 based SoCs
71 * Quad ARM Cortex-A7 based SoCs
123 * Quad ARM Cortex-A15, Quad ARM Cortex-A7 based SoCs
130 * Octa ARM Cortex-A7 based SoCs
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| /linux-6.1.9/arch/arm/include/debug/ |
| D | exynos.S | 27 teq \tmp, #0x100 @@ A15 + A7 but boot to A7
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| /linux-6.1.9/Documentation/arm/stm32/ |
| D | stm32mp13-overview.rst | 11 - One Cortex-A7 application core
18 - Cortex-A7 core running up to @900MHz
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| D | stm32mp157-overview.rst | 11 - Dual core Cortex-A7 application core
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| /linux-6.1.9/Documentation/devicetree/bindings/clock/ |
| D | qcom,a7pll.yaml | 7 title: Qualcomm A7 PLL Binding
13 The A7 PLL on the Qualcomm platforms like SDX55, SDX65 is used to provide high
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| D | imx7ulp-scg-clock.yaml | 18 and A7 domain. Except for a few clock sources shared between two
24 A7 clock management consists of SCG1, PCC2, PCC3, and CMC1 modules.
26 Note: this binding doc is only for A7 clock domain.
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| D | imx7ulp-pcc-clock.yaml | 18 and A7 domain. Except for a few clock sources shared between two
24 A7 clock management consists of SCG1, PCC2, PCC3, and CMC1 modules.
26 Note: this binding doc is only for A7 clock domain.
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| D | brcm,bcm53573-ilp.txt | 8 on Broadcom BCM53573 devices using Cortex-A7 CPU.
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| /linux-6.1.9/Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,imx7ulp-pinctrl.txt | 3 i.MX 7ULP has three IOMUXC instances: IOMUXC0 for M4 ports, IOMUXC1 for A7
7 This binding doc is only for the IOMUXC1 support in A7 Domain and it only
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| /linux-6.1.9/Documentation/admin-guide/device-mapper/ |
| D | dm-raid.rst | 129 A4 A4 A5 A6 A6 A7 A7 A8 A8
145 A3 A4 A4 A5 A6 A5 A6 A7 A8
146 A5 A6 A7 A8 A9 A9 A10 A11 A12
149 A4 A3 A6 A4 A5 A6 A5 A8 A7
150 A6 A5 A9 A7 A8 A10 A9 A12 A11
162 A3 A4 A4 A5 A6 A5 A6 A7 A8
163 A4 A3 A6 A4 A5 A6 A5 A8 A7
164 A5 A6 A7 A8 A9 A9 A10 A11 A12
165 A6 A5 A9 A7 A8 A10 A9 A12 A11
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| /linux-6.1.9/arch/arm/mach-exynos/ |
| D | Kconfig | 51 Samsung Exynos3 (Cortex-A7) SoC based systems
67 Samsung Exynos5 (Cortex-A15/A7) SoC based systems
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| /linux-6.1.9/arch/arm/mach-bcm/ |
| D | Kconfig | 175 BCM53573 series is set of SoCs using ARM Cortex-A7 CPUs with wireless
220 bool "Cortex-A7 SoCs"
222 Say Y if you intend to run the kernel on a Broadcom Broadband ARM A7
225 This enables support for Broadcom BCA ARM A7 broadband chipsets,
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| /linux-6.1.9/Documentation/devicetree/bindings/arm/ |
| D | sunplus,sp7021.yaml | 14 ARM platforms using Sunplus SP7021, an ARM Cortex A7 (4-cores) based SoC.
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| /linux-6.1.9/arch/arm/mach-mstar/ |
| D | Kconfig | 12 based on Armv7 cores like the Cortex A7 and share the same
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| /linux-6.1.9/arch/arm/mach-sunplus/ |
| D | Kconfig | 25 Cortex-A7 with various peripherals (e.g.: I2C, SPI, SDIO,
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| /linux-6.1.9/tools/perf/arch/riscv/util/ |
| D | unwind-libdw.c | 38 dwarf_regs[17] = REG(A7); in libdw__arch_set_initial_registers()
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| /linux-6.1.9/Documentation/hwmon/ |
| D | aht10.rst | 16 …Chinese: http://www.aosong.com/userfiles/files/media/AHT10%E4%BA%A7%E5%93%81%E6%89%8B%E5%86%8C%20A…
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| /linux-6.1.9/Documentation/devicetree/bindings/timer/ |
| D | nxp,sysctr-timer.yaml | 14 which provides a shared time base to Cortex A15, A7, A53, A73,
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| /linux-6.1.9/tools/perf/pmu-events/arch/x86/ |
| D | mapfile.csv | 13 GenuineIntel-6-(7D|7E|A7),v1.15,icelake,core
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