Home
last modified time | relevance | path

Searched refs:A5 (Results 1 – 25 of 56) sorted by relevance

123

/linux-6.1.9/Documentation/devicetree/bindings/arm/
Darm,scu.yaml13 As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided
20 - Cortex-A5: see DDI0434B Cortex-A5 MPCore Technical Reference Manual
Darm,vexpress-juno.yaml51 - description: CoreTile Express A5x2 (V2P-CA5s) has 2 Cortex A5 CPU cores
53 and Jazelle support in the Cortex A5 family. See ARM DUI 0541C.
/linux-6.1.9/arch/s390/crypto/
Dchacha-s390.S464 #define A5 %v20 macro
503 VLR A5,K0
530 VAF A5,A5,B5
536 VX D5,D5,A5
568 VAF A5,A5,B5
574 VX D5,D5,A5
625 VAF A5,A5,B5
631 VX D5,D5,A5
663 VAF A5,A5,B5
669 VX D5,D5,A5
[all …]
/linux-6.1.9/Documentation/admin-guide/device-mapper/
Ddm-raid.rst128 A3 A3 A4 A4 A5 A5 A5 A6 A6
129 A4 A4 A5 A6 A6 A7 A7 A8 A8
145 A3 A4 A4 A5 A6 A5 A6 A7 A8
146 A5 A6 A7 A8 A9 A9 A10 A11 A12
149 A4 A3 A6 A4 A5 A6 A5 A8 A7
150 A6 A5 A9 A7 A8 A10 A9 A12 A11
162 A3 A4 A4 A5 A6 A5 A6 A7 A8
163 A4 A3 A6 A4 A5 A6 A5 A8 A7
164 A5 A6 A7 A8 A9 A9 A10 A11 A12
165 A6 A5 A9 A7 A8 A10 A9 A12 A11
/linux-6.1.9/arch/m68k/fpsp040/
Dsetox.S128 | p = R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5))))
130 | made as "short" as possible: A1 (which is 1/2), A4 and A5
138 | [ S*(A1 + S*(A3 + S*A5)) ]
513 |-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5))))
515 |--[R+R*S*(A2+S*A4)] + [S*(A1+S*(A3+S*A5))]
520 fmoves #0x3AB60B70,%fp2 | ...fp2 IS A5
523 fmulx %fp1,%fp2 | ...fp2 IS S*A5
527 faddd EXPA3,%fp2 | ...fp2 IS A3+S*A5
530 fmulx %fp1,%fp2 | ...fp2 IS S*(A3+S*A5)
538 fadds #0x3F000000,%fp2 | ...fp2 IS A1+S*(A3+S*A5)
[all …]
Dslogn.S388 |--U + V*(A1+U*(A2+U*(A3+U*(A4+U*(A5+U*A6))))) WHICH IS
389 |--[U + V*(A1+V*(A3+V*A5))] + [U*V*(A2+V*(A4+V*A6))]
395 fmuld LOGA5,%fp2 | ...V*A5
398 faddd LOGA3,%fp2 | ...A3+V*A5
401 fmulx %fp3,%fp2 | ...V*(A3+V*A5)
404 faddd LOGA1,%fp2 | ...A1+V*(A3+V*A5)
408 fmulx %fp3,%fp2 | ...V*(A1+V*(A3+V*A5)), FP3 RELEASED
411 faddx %fp2,%fp0 | ...U+V*(A1+V*(A3+V*A5)), FP2 RELEASED
Dssin.S257 faddd SINA5,%fp3 | ...A5+TA7
260 fmulx %fp1,%fp3 | ...T(A5+TA7)
263 faddd SINA3,%fp3 | ...A3+T(A5+TA7)
266 fmulx %fp3,%fp1 | ...T(A3+T(A5+TA7))
269 faddx SINA1,%fp1 | ...A1+T(A3+T(A5+TA7))
609 faddd SINA5,%fp1 | ...A5+S(A6+SA7)
614 fmulx %fp0,%fp1 | ...S(A5+S(A6+SA7))
618 faddd SINA4,%fp1 | ...A4+S(A5+S(A6+SA7))
682 faddd SINA5,%fp2 | ...A5+S(A6+SA7)
685 fmulx %fp0,%fp2 | ...S(A5+S(A6+SA7))
[all …]
Dbinstr.S35 | A5. Add using the carry the 64-bit quantities in d2:d3 and d4:d5
102 | A5. Add mul by 8 to mul by 2. D1 contains the digit formed.
Dstwotox.S62 | P = r + r*r*(A1+r*(A2+...+r*A5)).
/linux-6.1.9/Documentation/arm/
Dmicrochip.rst101 * ARM Cortex-A5 based SoCs
112 …http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-11121-32-bit-Cortex-A5-Microcontroller-SAMA5…
114 * ARM Cortex-A5 + NEON based SoCs
/linux-6.1.9/tools/perf/arch/riscv/util/
Dunwind-libdw.c36 dwarf_regs[15] = REG(A5); in libdw__arch_set_initial_registers()
/linux-6.1.9/Documentation/admin-guide/media/
Dtm6000-cardlist.rst67 - 0ccd:0086, 0ccd:00A5
Dcx231xx-cardlist.rst30 - 0572:58A5
/linux-6.1.9/Documentation/devicetree/bindings/watchdog/
Darm,twd-wdt.yaml13 ARM 11MP, Cortex-A5 and Cortex-A9 are often associated with a per-core
/linux-6.1.9/Documentation/devicetree/bindings/timer/
Darm,twd-timer.yaml13 ARM 11MP, Cortex-A5 and Cortex-A9 are often associated with a per-core
/linux-6.1.9/Documentation/devicetree/bindings/arm/freescale/
Dfsl,vf610-mscm-ir.txt8 which comes with a Cortex-A5/Cortex-M4 combination).
/linux-6.1.9/tools/perf/pmu-events/arch/x86/
Dmapfile.csv25 GenuineIntel-6-(4E|5E|8E|9E|A5|A6),v53,skylake,core
/linux-6.1.9/arch/arm/mach-versatile/
DKconfig276 - LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs
287 bool "Enable A5 and A9 only errata work-arounds"
294 based on Cortex-A5 and Cortex-A9 processors. In order to
/linux-6.1.9/Documentation/devicetree/bindings/media/
Dexynos4-fimc-is.txt4 The Exynos4x12 SoC series FIMC-IS V1.5 comprises of a dedicated ARM Cortex-A5
/linux-6.1.9/arch/arm64/boot/dts/amd/
Damd-seattle-xgbe-b.dtsi54 mac-address = [ 02 A1 A2 A3 A4 A5 ];
/linux-6.1.9/arch/arm/boot/dts/
Dvexpress-v2p-ca5s.dts6 * Cortex-A5 MPCore (V2P-CA5s)
/linux-6.1.9/drivers/pinctrl/aspeed/
Dpinctrl-aspeed-g5.c1161 #define A5 155 macro
1162 SIG_EXPR_LIST_DECL_SINGLE(A5, GPIOT3, GPIOT3, SIG_DESC_SET(SCUA0, 3));
1163 SIG_EXPR_LIST_DECL_SINGLE(A5, RMII1TXD1, RMII1, RMII1_DESC);
1164 SIG_EXPR_LIST_DECL_SINGLE(A5, RGMII1TXD1, RGMII1);
1165 PIN_DECL_(A5, SIG_EXPR_LIST_PTR(A5, GPIOT3), SIG_EXPR_LIST_PTR(A5, RMII1TXD1),
1166 SIG_EXPR_LIST_PTR(A5, RGMII1TXD1));
1267 FUNC_GROUP_DECL(RGMII1, B4, A4, A3, D6, C5, C4, B5, E9, F9, A5, E7, D7);
1268 FUNC_GROUP_DECL(RMII1, B4, A3, D6, C5, C4, B5, E9, F9, A5);
1918 ASPEED_PINCTRL_PIN(A5),
2546 ASPEED_SB_PINCONF(PIN_CONFIG_DRIVE_STRENGTH, E9, A5, SCU90, 9),
/linux-6.1.9/arch/arm64/boot/dts/ti/
Dk3-j7200-som-p0.dtsi96 J721E_WKUP_IOPAD(0x18, PIN_INPUT, 1) /* (A5) MCU_OSPI0_D3.MCU_HYPERBUS0_DQ3 */
Dk3-am65-iot2050-common.dtsi406 "IO1", "IO2", "", "IO3", "IO17-direction", "A5",
446 "A5-pull", "", "",
/linux-6.1.9/arch/m68k/ifpsp060/src/
Dfplsp.S5102 fadd.d SINA5(%pc),%fp3 # A5+TA7
5105 fmul.x %fp1,%fp3 # T(A5+TA7)
5108 fadd.d SINA3(%pc),%fp3 # A3+T(A5+TA7)
5111 fmul.x %fp3,%fp1 # T(A3+T(A5+TA7))
5114 fadd.x SINA1(%pc),%fp1 # A1+T(A3+T(A5+TA7))
6785 # p = R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5)))) #
6788 # and A5 are single precision; A2 and A3 are double #
6796 # [ S*(A1 + S*(A3 + S*A5)) ] #
7152 #-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5))))
7154 #--[R+R*S*(A2+S*A4)] + [S*(A1+S*(A3+S*A5))]
[all …]

123