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Searched refs:A32 (Results 1 – 4 of 4) sorted by relevance

/linux-6.1.9/arch/x86/boot/
Dcpucheck.c57 #define A32(a, b, c, d) (((d) << 24)+((c) << 16)+((b) << 8)+(a)) macro
61 return cpu_vendor[0] == A32('A', 'u', 't', 'h') && in is_amd()
62 cpu_vendor[1] == A32('e', 'n', 't', 'i') && in is_amd()
63 cpu_vendor[2] == A32('c', 'A', 'M', 'D'); in is_amd()
68 return cpu_vendor[0] == A32('C', 'e', 'n', 't') && in is_centaur()
69 cpu_vendor[1] == A32('a', 'u', 'r', 'H') && in is_centaur()
70 cpu_vendor[2] == A32('a', 'u', 'l', 's'); in is_centaur()
75 return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && in is_transmeta()
76 cpu_vendor[1] == A32('i', 'n', 'e', 'T') && in is_transmeta()
77 cpu_vendor[2] == A32('M', 'x', '8', '6'); in is_transmeta()
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/linux-6.1.9/Documentation/devicetree/bindings/arm/
Darm,corstone1000.yaml18 Support for Cortex‑A32, Cortex‑A35 and Cortex‑A53 processors. Two expansion
/linux-6.1.9/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic-v3.yaml83 ARMv8.0 architecture such as Cortex-A32, A34, A35, A53, A57, A72 and
/linux-6.1.9/arch/arm64/
DKconfig1615 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that