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Searched refs:wm_with_clock_ranges (Results 1 – 8 of 8) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu_helper.c725 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges) in smu_set_watermarks_for_clocks_ranges() argument
730 if (!table || !wm_with_clock_ranges) in smu_set_watermarks_for_clocks_ranges()
733 if (wm_with_clock_ranges->num_wm_dmif_sets > 4 || wm_with_clock_ranges->num_wm_mcif_sets > 4) in smu_set_watermarks_for_clocks_ranges()
736 for (i = 0; i < wm_with_clock_ranges->num_wm_dmif_sets; i++) { in smu_set_watermarks_for_clocks_ranges()
739 (wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_min_dcfclk_clk_in_khz / in smu_set_watermarks_for_clocks_ranges()
743 (wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_max_dcfclk_clk_in_khz / in smu_set_watermarks_for_clocks_ranges()
747 (wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_min_mem_clk_in_khz / in smu_set_watermarks_for_clocks_ranges()
751 (wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_max_mem_clk_in_khz / in smu_set_watermarks_for_clocks_ranges()
754 wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_set_id; in smu_set_watermarks_for_clocks_ranges()
757 for (i = 0; i < wm_with_clock_ranges->num_wm_mcif_sets; i++) { in smu_set_watermarks_for_clocks_ranges()
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Dsmu_helper.h135 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges);
Dsmu10_hwmgr.c1346 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in smu10_set_watermarks_for_clocks_ranges() local
1351 smu_set_watermarks_for_clocks_ranges(table,wm_with_clock_ranges); in smu10_set_watermarks_for_clocks_ranges()
Dvega12_hwmgr.c1981 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega12_set_watermarks_for_clocks_ranges() local
1986 smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges); in vega12_set_watermarks_for_clocks_ranges()
Dvega20_hwmgr.c2941 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega20_set_watermarks_for_clocks_ranges() local
2946 smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges); in vega20_set_watermarks_for_clocks_ranges()
Dvega10_hwmgr.c4498 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_range; in vega10_set_watermarks_for_clocks_ranges() local
4502 smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges); in vega10_set_watermarks_for_clocks_ranges()
/linux-5.19.10/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_pp_smu.c400 struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges) in dm_pp_notify_wm_clock_changes() argument
411 (void *)wm_with_clock_ranges)) in dm_pp_notify_wm_clock_changes()
468 struct dm_pp_wm_sets_with_clock_ranges_soc15 wm_with_clock_ranges; in pp_rv_set_wm_ranges() local
469 …struct dm_pp_clock_range_for_dmif_wm_set_soc15 *wm_dce_clocks = wm_with_clock_ranges.wm_dmif_clock… in pp_rv_set_wm_ranges()
470 …struct dm_pp_clock_range_for_mcif_wm_set_soc15 *wm_soc_clocks = wm_with_clock_ranges.wm_mcif_clock… in pp_rv_set_wm_ranges()
473 wm_with_clock_ranges.num_wm_dmif_sets = ranges->num_reader_wm_sets; in pp_rv_set_wm_ranges()
474 wm_with_clock_ranges.num_wm_mcif_sets = ranges->num_writer_wm_sets; in pp_rv_set_wm_ranges()
476 for (i = 0; i < wm_with_clock_ranges.num_wm_dmif_sets; i++) { in pp_rv_set_wm_ranges()
492 for (i = 0; i < wm_with_clock_ranges.num_wm_mcif_sets; i++) { in pp_rv_set_wm_ranges()
509 &wm_with_clock_ranges); in pp_rv_set_wm_ranges()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/
Ddm_services.h206 struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges);