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Searched refs:vmw_read (Results 1 – 7 of 7) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/vmwgfx/
Dvmwgfx_drv.c436 dev_priv->enable_state = vmw_read(dev_priv, SVGA_REG_ENABLE); in vmw_device_init()
437 dev_priv->config_done_state = vmw_read(dev_priv, SVGA_REG_CONFIG_DONE); in vmw_device_init()
438 dev_priv->traces_state = vmw_read(dev_priv, SVGA_REG_TRACES); in vmw_device_init()
467 while (vmw_read(vmw, SVGA_REG_BUSY) != 0) in vmw_device_fini()
623 width = vmw_read(dev_priv, SVGA_REG_WIDTH); in vmw_get_initial_size()
624 height = vmw_read(dev_priv, SVGA_REG_HEIGHT); in vmw_get_initial_size()
796 svga_id = vmw_read(dev, SVGA_REG_ID); in vmw_detect_version()
850 dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES); in vmw_driver_load()
855 dev_priv->capabilities2 = vmw_read(dev_priv, SVGA_REG_CAP2); in vmw_driver_load()
871 dev_priv->vram_size = vmw_read(dev_priv, SVGA_REG_VRAM_SIZE); in vmw_driver_load()
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Dvmwgfx_devcaps.c96 vmw->devcaps[i] = vmw_read(vmw, SVGA_REG_DEV_CAP); in vmw_devcaps_create()
Dvmwgfx_irq.c123 return (vmw_read(dev_priv, SVGA_REG_BUSY) == 0); in vmw_fifo_idle()
Dvmwgfx_drv.h717 static inline uint32_t vmw_read(struct vmw_private *dev_priv, in vmw_read() function
1661 fence = vmw_read(dev_priv, SVGA_REG_FENCE); in vmw_fence_read()
1678 status = vmw_read(vmw, SVGA_REG_IRQ_STATUS); in vmw_irq_status_read()
Dvmwgfx_kms.c176 mob_max_size = vmw_read(dev_priv, SVGA_REG_MOB_MAX_SIZE); in vmw_du_create_cursor_mob_array()
177 cursor_max_dim = vmw_read(dev_priv, SVGA_REG_CURSOR_MAX_DIMENSION); in vmw_du_create_cursor_mob_array()
2141 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) { in vmw_kms_write_svga()
2143 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH)); in vmw_kms_write_svga()
2296 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS); in vmw_du_connector_detect()
Dvmwgfx_cmd.c123 min = vmw_read(dev_priv, SVGA_REG_MEM_REGS); in vmw_fifo_create()
Dvmwgfx_fence.c88 return vmw_read(vmw, SVGA_REG_FENCE_GOAL); in vmw_fence_goal_read()