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Searched refs:via_write_reg (Results 1 – 7 of 7) sorted by relevance

/linux-5.19.10/drivers/video/fbdev/via/
Dvia_modesetting.c38 via_write_reg(VIACR, 0x00, raw.hor_total & 0xFF); in via_set_primary_timing()
39 via_write_reg(VIACR, 0x01, raw.hor_addr & 0xFF); in via_set_primary_timing()
40 via_write_reg(VIACR, 0x02, raw.hor_blank_start & 0xFF); in via_set_primary_timing()
42 via_write_reg(VIACR, 0x04, raw.hor_sync_start & 0xFF); in via_set_primary_timing()
45 via_write_reg(VIACR, 0x06, raw.ver_total & 0xFF); in via_set_primary_timing()
55 via_write_reg(VIACR, 0x10, raw.ver_sync_start & 0xFF); in via_set_primary_timing()
57 via_write_reg(VIACR, 0x12, raw.ver_addr & 0xFF); in via_set_primary_timing()
58 via_write_reg(VIACR, 0x15, raw.ver_blank_start & 0xFF); in via_set_primary_timing()
59 via_write_reg(VIACR, 0x16, raw.ver_blank_end & 0xFF); in via_set_primary_timing()
93 via_write_reg(VIACR, 0x50, raw.hor_total & 0xFF); in via_set_secondary_timing()
[all …]
Dvia_clock.c45 via_write_reg(VIASR, 0x46, data & 0xFF); in cle266_set_primary_pll_encoded()
46 via_write_reg(VIASR, 0x47, (data >> 8) & 0xFF); in cle266_set_primary_pll_encoded()
53 via_write_reg(VIASR, 0x44, data & 0xFF); in k800_set_primary_pll_encoded()
54 via_write_reg(VIASR, 0x45, (data >> 8) & 0xFF); in k800_set_primary_pll_encoded()
55 via_write_reg(VIASR, 0x46, (data >> 16) & 0xFF); in k800_set_primary_pll_encoded()
62 via_write_reg(VIASR, 0x44, data & 0xFF); in cle266_set_secondary_pll_encoded()
63 via_write_reg(VIASR, 0x45, (data >> 8) & 0xFF); in cle266_set_secondary_pll_encoded()
70 via_write_reg(VIASR, 0x4A, data & 0xFF); in k800_set_secondary_pll_encoded()
71 via_write_reg(VIASR, 0x4B, (data >> 8) & 0xFF); in k800_set_secondary_pll_encoded()
72 via_write_reg(VIASR, 0x4C, (data >> 16) & 0xFF); in k800_set_secondary_pll_encoded()
[all …]
Dvia_i2c.c45 via_write_reg(adap_data->io_port, adap_data->ioport_index, val); in via_i2c_setscl()
103 via_write_reg(adap_data->io_port, adap_data->ioport_index, val); in via_i2c_setsda()
Dvia-gpio.c99 via_write_reg(VIASR, gpio->vg_port_index, reg); in via_gpio_set()
Dhw.h18 #define viafb_write_reg(i, p, d) via_write_reg(p, i, d)
Dhw.c1798 via_write_reg(VIASR, i, VPIT.SR[i - 1]); in hw_init()
1804 via_write_reg(VIAGR, i, VPIT.GR[i]); in hw_init()
/linux-5.19.10/include/linux/
Dvia-core.h194 static inline void via_write_reg(u16 port, u8 index, u8 data) in via_write_reg() function