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Searched refs:up_hyst_offset (Results 1 – 4 of 4) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dfiji_smumgr.c2565 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in fiji_update_dpm_settings() local
2592 up_hyst_offset = array + (sizeof(SMU73_Discrete_GraphicsLevel) * i) in fiji_update_dpm_settings()
2596 offset = up_hyst_offset & ~0x3; in fiji_update_dpm_settings()
2598 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t)); in fiji_update_dpm_settings()
2627 up_hyst_offset = mclk_array + (sizeof(SMU73_Discrete_MemoryLevel) * i) in fiji_update_dpm_settings()
2631 offset = up_hyst_offset & ~0x3; in fiji_update_dpm_settings()
2633 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in fiji_update_dpm_settings()
Dpolaris10_smumgr.c2605 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in polaris10_update_dpm_settings() local
2632 up_hyst_offset = array + (sizeof(SMU74_Discrete_GraphicsLevel) * i) in polaris10_update_dpm_settings()
2636 offset = up_hyst_offset & ~0x3; in polaris10_update_dpm_settings()
2638 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t)); in polaris10_update_dpm_settings()
2667 up_hyst_offset = mclk_array + (sizeof(SMU74_Discrete_MemoryLevel) * i) in polaris10_update_dpm_settings()
2671 offset = up_hyst_offset & ~0x3; in polaris10_update_dpm_settings()
2673 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in polaris10_update_dpm_settings()
Dci_smumgr.c2777 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in ci_update_dpm_settings() local
2804 up_hyst_offset = array + (sizeof(SMU7_Discrete_GraphicsLevel) * i) in ci_update_dpm_settings()
2808 offset = up_hyst_offset & ~0x3; in ci_update_dpm_settings()
2810 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpH, sizeof(uint8_t)); in ci_update_dpm_settings()
2839 up_hyst_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i) in ci_update_dpm_settings()
2843 offset = up_hyst_offset & ~0x3; in ci_update_dpm_settings()
2845 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpH, sizeof(uint8_t)); in ci_update_dpm_settings()
Dtonga_smumgr.c3164 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in tonga_update_dpm_settings() local
3191 up_hyst_offset = array + (sizeof(SMU72_Discrete_GraphicsLevel) * i) in tonga_update_dpm_settings()
3195 offset = up_hyst_offset & ~0x3; in tonga_update_dpm_settings()
3197 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t)); in tonga_update_dpm_settings()
3226 up_hyst_offset = mclk_array + (sizeof(SMU72_Discrete_MemoryLevel) * i) in tonga_update_dpm_settings()
3230 offset = up_hyst_offset & ~0x3; in tonga_update_dpm_settings()
3232 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in tonga_update_dpm_settings()