/linux-5.19.10/drivers/clk/imx/ |
D | clk-pllv1.c | 56 unsigned long long ull; in clk_pllv1_recalc_rate() local 98 ull = (unsigned long long)rate * mfn_abs; in clk_pllv1_recalc_rate() 100 do_div(ull, mfd + 1); in clk_pllv1_recalc_rate() 103 ull = (rate * mfi) - ull; in clk_pllv1_recalc_rate() 105 ull = (rate * mfi) + ull; in clk_pllv1_recalc_rate() 107 return ull; in clk_pllv1_recalc_rate()
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/linux-5.19.10/arch/parisc/lib/ |
D | ucmpdi2.c | 5 unsigned long long ull; member 14 union ull_union au = {.ull = a}; in __ucmpdi2() 15 union ull_union bu = {.ull = b}; in __ucmpdi2()
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/linux-5.19.10/drivers/crypto/cavium/zip/ |
D | zip_main.c | 160 que_sbuf_ctl.u_reg64 = 0ull; in zip_init_hw() 189 que_sbuf_addr.u_reg64 = 0ull; in zip_init_hw() 223 que_map.u_reg64 = 0ull; in zip_init_hw() 233 que_pri.u_reg64 = 0ull; in zip_init_hw() 487 u64 val = 0ull; in zip_stats_show() 488 u64 avg_chunk = 0ull, avg_cr = 0ull; in zip_stats_show()
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D | zip_device.c | 133 ncp.u_reg64 = 0ull; in zip_load_instr() 158 dbell.u_reg64 = 0ull; in zip_load_instr()
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/linux-5.19.10/tools/testing/selftests/bpf/progs/ |
D | bpf_cubic.c | 130 if (!(x & (~0ull << (BITS_PER_U64-32)))) { in fls64() 134 if (!(x & (~0ull << (BITS_PER_U64-16)))) { in fls64() 138 if (!(x & (~0ull << (BITS_PER_U64-8)))) { in fls64() 142 if (!(x & (~0ull << (BITS_PER_U64-4)))) { in fls64() 146 if (!(x & (~0ull << (BITS_PER_U64-2)))) { in fls64() 150 if (!(x & (~0ull << (BITS_PER_U64-1)))) in fls64()
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/linux-5.19.10/arch/powerpc/include/asm/ |
D | spu.h | 379 #define MFC_CNTL_RESUME_DMA_QUEUE (0ull << 0) 383 #define MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION (0ull << 8) 579 #define MFC_LSACR_COMPARE_MASK ((~0ull) << 32) 580 #define MFC_LSACR_COMPARE_ADDR ((~0ull) >> 32) 585 #define MFC_LSCRR_QI_MASK ((~0ull) << MFC_LSCRR_QI_SHIFT) 630 #define SPU_ECC_CNTL_E (1ull << 0ull)
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/linux-5.19.10/arch/x86/kvm/mmu/ |
D | spte.c | 409 shadow_accessed_mask = has_ad_bits ? VMX_EPT_ACCESS_BIT : 0ull; in kvm_mmu_set_ept_masks() 410 shadow_dirty_mask = has_ad_bits ? VMX_EPT_DIRTY_BIT : 0ull; in kvm_mmu_set_ept_masks() 411 shadow_nx_mask = 0ull; in kvm_mmu_set_ept_masks() 413 shadow_present_mask = has_exec_only ? 0ull : VMX_EPT_READABLE_MASK; in kvm_mmu_set_ept_masks()
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/linux-5.19.10/arch/x86/include/asm/ |
D | processor-flags.h | 48 #define CR3_PCID_MASK 0ull
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D | pgtable-invert.h | 24 return __pte_needs_invert(val) ? ~0ull : 0; in protnone_mask()
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/linux-5.19.10/drivers/crypto/cavium/cpt/ |
D | cptpf_main.c | 94 cpt_write_csr64(cpt->reg_base, CPTX_PF_MBOX_ENA_W1CX(0, 0), ~0ull); in cpt_disable_mbox_interrupts() 100 cpt_write_csr64(cpt->reg_base, CPTX_PF_ECC0_ENA_W1C(0), ~0ull); in cpt_disable_ecc_interrupts() 106 cpt_write_csr64(cpt->reg_base, CPTX_PF_EXEC_ENA_W1C(0), ~0ull); in cpt_disable_exec_interrupts() 119 cpt_write_csr64(cpt->reg_base, CPTX_PF_MBOX_ENA_W1SX(0, 0), ~0ull); in cpt_enable_mbox_interrupts() 425 CPTX_PF_ENGX_UCODE_BASE(0, core), 0ull); in cpt_unload_microcode()
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/linux-5.19.10/arch/mips/include/asm/octeon/ |
D | cvmx-pip.h | 47 CVMX_PIP_L4_NO_ERR = 0ull, 78 CVMX_PIP_IP_NO_ERR = 0ull, 102 CVMX_PIP_RX_NO_ERR = 0ull,
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D | cvmx-ciu-defs.h | 13 (CVMX_ADD_IO_SEG(0x0001070000000000ull + addr##ull) + \
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/linux-5.19.10/drivers/misc/cxl/ |
D | cxllib.c | 14 #define CXL_INVALID_DRA ~0ull 68 (~0ull << CXL_DUMMY_READ_ALIGN); in allocate_dummy_read_buf()
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/linux-5.19.10/drivers/infiniband/core/ |
D | packer.c | 101 mask = cpu_to_be64((~0ull >> (64 - desc[i].size_bits)) << shift); in ib_pack() 180 mask = (~0ull >> (64 - desc[i].size_bits)) << shift; in ib_unpack()
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/linux-5.19.10/fs/ocfs2/ |
D | ocfs2_trace.h | 305 TP_PROTO(unsigned long long ull, int value1, int value2, int value3), 306 TP_ARGS(ull, value1, value2, value3), 308 __field( unsigned long long, ull ) 314 __entry->ull = ull; 320 __entry->ull, __entry->value1, 326 TP_PROTO(unsigned long long ull, int value1, \ 328 TP_ARGS(ull, value1, value2, value3)) 331 TP_PROTO(unsigned long long ull, unsigned int value1, 333 TP_ARGS(ull, value1, value2, value3), 335 __field(unsigned long long, ull) [all …]
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/linux-5.19.10/drivers/crypto/marvell/octeontx/ |
D | otx_cptpf_mbox.c | 89 mbx->data = 0ull; in otx_cpt_mbox_send_ack() 98 mbx->data = 0ull; in otx_cptpf_mbox_send_nack()
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D | otx_cptpf_main.c | 20 writeq(~0ull, cpt->reg_base + OTX_CPT_PF_MBOX_ENA_W1CX(0)); in otx_cpt_disable_mbox_interrupts() 26 writeq(~0ull, cpt->reg_base + OTX_CPT_PF_MBOX_ENA_W1SX(0)); in otx_cpt_enable_mbox_interrupts()
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/linux-5.19.10/arch/powerpc/platforms/cell/spufs/ |
D | spu_utils.h | 15 unsigned long long ull; member
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/linux-5.19.10/drivers/virt/nitro_enclaves/ |
D | ne_misc_dev_test.c | 6 #define INVALID_VALUE (~0ull)
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/linux-5.19.10/arch/powerpc/mm/ |
D | init-common.c | 25 phys_addr_t memstart_addr __ro_after_init = (phys_addr_t)~0ull;
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/linux-5.19.10/arch/x86/hyperv/ |
D | hv_init.c | 35 u64 hv_current_partition_id = ~0ull; 495 BUG_ON(hv_root_partition && hv_current_partition_id == ~0ull); in hyperv_init()
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/linux-5.19.10/include/linux/ |
D | topology.h | 215 #define topology_ppin(cpu) ((void)(cpu), 0ull)
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D | bitfield.h | 72 __bf_cast_unsigned(_reg, ~0ull), \
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/linux-5.19.10/arch/x86/kvm/vmx/ |
D | pmu_intel.c | 494 pmu->global_ctrl_mask = ~0ull; in intel_pmu_refresh() 495 pmu->global_ovf_ctrl_mask = ~0ull; in intel_pmu_refresh() 496 pmu->fixed_ctr_ctrl_mask = ~0ull; in intel_pmu_refresh()
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/linux-5.19.10/include/linux/ceph/ |
D | msgr.h | 33 #define CEPH_MSGR2_INCARNATION_1 (0ull)
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