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Searched refs:ttu_regs (Results 1 – 24 of 24) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_rq_dlg_helpers.c328 …ttu_regs_st(struct display_mode_lib *mode_lib, const struct _vcs_dpi_display_ttu_regs_st *ttu_regs) in print__ttu_regs_st() argument
334 ttu_regs->qos_level_low_wm); in print__ttu_regs_st()
337 ttu_regs->qos_level_high_wm); in print__ttu_regs_st()
340 ttu_regs->min_ttu_vblank); in print__ttu_regs_st()
343 ttu_regs->qos_level_flip); in print__ttu_regs_st()
346 ttu_regs->refcyc_per_req_delivery_pre_l); in print__ttu_regs_st()
349 ttu_regs->refcyc_per_req_delivery_l); in print__ttu_regs_st()
352 ttu_regs->refcyc_per_req_delivery_pre_c); in print__ttu_regs_st()
355 ttu_regs->refcyc_per_req_delivery_c); in print__ttu_regs_st()
358 ttu_regs->refcyc_per_req_delivery_cur0); in print__ttu_regs_st()
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Ddml1_display_rq_dlg_calc.h57 struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
Ddisplay_rq_dlg_helpers.h44 …tu_regs_st(struct display_mode_lib *mode_lib, const struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
Ddisplay_mode_lib.h52 display_ttu_regs_st *ttu_regs,
Ddml_wrapper.c1643 &context->res_ctx.pipe_ctx[i].ttu_regs, in dml_calculate_dlg_params()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hw_sequencer_debug.c304 struct _vcs_dpi_display_ttu_regs_st *ttu_regs = &s->ttu_attr; in dcn10_get_ttu_states() local
311 …pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_v… in dcn10_get_ttu_states()
312ttu_regs->qos_level_flip, ttu_regs->refcyc_per_req_delivery_pre_l, ttu_regs->refcyc_per_req_delive… in dcn10_get_ttu_states()
313ttu_regs->refcyc_per_req_delivery_pre_c, ttu_regs->refcyc_per_req_delivery_c, ttu_regs->refcyc_per… in dcn10_get_ttu_states()
314 ttu_regs->refcyc_per_req_delivery_pre_cur0, ttu_regs->refcyc_per_req_delivery_cur1, in dcn10_get_ttu_states()
315ttu_regs->refcyc_per_req_delivery_pre_cur1, ttu_regs->qos_level_fixed_l, ttu_regs->qos_ramp_disabl… in dcn10_get_ttu_states()
316 ttu_regs->qos_level_fixed_c, ttu_regs->qos_ramp_disable_c, ttu_regs->qos_level_fixed_cur0, in dcn10_get_ttu_states()
317ttu_regs->qos_ramp_disable_cur0, ttu_regs->qos_level_fixed_cur1, ttu_regs->qos_ramp_disable_cur1); in dcn10_get_ttu_states()
Ddcn10_hw_sequencer.c264 struct _vcs_dpi_display_ttu_regs_st *ttu_regs = &s->ttu_attr; in dcn10_log_hubp_states() local
268 …pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_v… in dcn10_log_hubp_states()
269ttu_regs->qos_level_flip, ttu_regs->refcyc_per_req_delivery_pre_l, ttu_regs->refcyc_per_req_delive… in dcn10_log_hubp_states()
270ttu_regs->refcyc_per_req_delivery_pre_c, ttu_regs->refcyc_per_req_delivery_c, ttu_regs->refcyc_per… in dcn10_log_hubp_states()
271 ttu_regs->refcyc_per_req_delivery_pre_cur0, ttu_regs->refcyc_per_req_delivery_cur1, in dcn10_log_hubp_states()
272ttu_regs->refcyc_per_req_delivery_pre_cur1, ttu_regs->qos_level_fixed_l, ttu_regs->qos_ramp_disabl… in dcn10_log_hubp_states()
273 ttu_regs->qos_level_fixed_c, ttu_regs->qos_ramp_disable_c, ttu_regs->qos_level_fixed_cur0, in dcn10_log_hubp_states()
274ttu_regs->qos_ramp_disable_cur0, ttu_regs->qos_level_fixed_cur1, ttu_regs->qos_ramp_disable_cur1); in dcn10_log_hubp_states()
2710 &pipe_ctx->ttu_regs, in dcn10_update_dchubp_dpp()
2716 &pipe_ctx->ttu_regs); in dcn10_update_dchubp_dpp()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/inc/hw/
Dhubp.h93 struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
100 struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
Dmem_input.h97 struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_rq_dlg_calc_20.h63 display_ttu_regs_st *ttu_regs,
Ddisplay_rq_dlg_calc_20v2.h63 display_ttu_regs_st *ttu_regs,
Ddisplay_rq_dlg_calc_20.c1551 display_ttu_regs_st *ttu_regs, in dml20_rq_dlg_get_dlg_reg() argument
1591 ttu_regs, in dml20_rq_dlg_get_dlg_reg()
Ddisplay_rq_dlg_calc_20v2.c1552 display_ttu_regs_st *ttu_regs, in dml20v2_rq_dlg_get_dlg_reg() argument
1592 ttu_regs, in dml20v2_rq_dlg_get_dlg_reg()
Ddcn20_fpu.c844 &context->res_ctx.pipe_ctx[i].ttu_regs, in dcn20_calculate_dlg_params()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_rq_dlg_calc_21.h63 display_ttu_regs_st *ttu_regs,
Ddisplay_rq_dlg_calc_21.c1660 display_ttu_regs_st *ttu_regs, in dml21_rq_dlg_get_dlg_reg() argument
1704 ttu_regs, in dml21_rq_dlg_get_dlg_reg()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_rq_dlg_calc_30.h59 display_ttu_regs_st *ttu_regs,
Ddisplay_rq_dlg_calc_30.c1833 display_ttu_regs_st *ttu_regs, in dml30_rq_dlg_get_dlg_reg() argument
1873 ttu_regs, in dml30_rq_dlg_get_dlg_reg()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_rq_dlg_calc_31.h59 display_ttu_regs_st *ttu_regs,
Ddisplay_rq_dlg_calc_31.c1692 display_ttu_regs_st *ttu_regs, in dml31_rq_dlg_get_dlg_reg() argument
1727 ttu_regs, in dml31_rq_dlg_get_dlg_reg()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/inc/
Dcore_types.h378 struct _vcs_dpi_display_ttu_regs_st ttu_regs; member
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/calcs/
Ddcn_calcs.c460 struct _vcs_dpi_display_ttu_regs_st *ttu_regs = &pipe->ttu_regs; in dcn_bw_calc_rq_dlg_ttu() local
471 memset(ttu_regs, 0, sizeof(*ttu_regs)); in dcn_bw_calc_rq_dlg_ttu()
512 ttu_regs, in dcn_bw_calc_rq_dlg_ttu()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hwseq.c1355 struct _vcs_dpi_display_ttu_regs_st old_ttu_attr = old_pipe->ttu_regs; in dcn20_detect_pipe_changes()
1357 struct _vcs_dpi_display_ttu_regs_st *new_ttu_attr = &new_pipe->ttu_regs; in dcn20_detect_pipe_changes()
1400 memcmp(&old_ttu_attr, &new_pipe->ttu_regs, sizeof(old_ttu_attr)) || in dcn20_detect_pipe_changes()
1430 &pipe_ctx->ttu_regs, in dcn20_update_dchubp_dpp()
1441 &pipe_ctx->ttu_regs); in dcn20_update_dchubp_dpp()
1935 &pipe_ctx->ttu_regs, in dcn20_update_bandwidth()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/core/
Ddc.c2889 odm_pipe->ttu_regs.min_ttu_vblank = MAX_TTU; in commit_planes_for_stream()
3012 &context->res_ctx.pipe_ctx[i].ttu_regs); in commit_planes_for_stream()