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Searched refs:train (Results 1 – 10 of 10) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/tegra/
Ddp.c439 void drm_dp_link_train_init(struct drm_dp_link_train *train) in drm_dp_link_train_init() argument
441 struct drm_dp_link_train_set *request = &train->request; in drm_dp_link_train_init()
442 struct drm_dp_link_train_set *adjust = &train->adjust; in drm_dp_link_train_init()
456 train->pattern = DP_TRAINING_PATTERN_DISABLE; in drm_dp_link_train_init()
457 train->clock_recovered = false; in drm_dp_link_train_init()
458 train->channel_equalized = false; in drm_dp_link_train_init()
461 static bool drm_dp_link_train_valid(const struct drm_dp_link_train *train) in drm_dp_link_train_valid() argument
463 return train->clock_recovered && train->channel_equalized; in drm_dp_link_train_valid()
468 struct drm_dp_link_train_set *request = &link->train.request; in drm_dp_link_apply_training()
511 if (link->train.pattern != DP_TRAINING_PATTERN_DISABLE) in drm_dp_link_apply_training()
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Ddp.h159 struct drm_dp_link_train train; member
174 void drm_dp_link_train_init(struct drm_dp_link_train *train);
Dsor.c810 u8 vs = link->train.request.voltage_swing[i]; in tegra_sor_dp_link_apply_training()
811 u8 pe = link->train.request.pre_emphasis[i]; in tegra_sor_dp_link_apply_training()
812 u8 pc = link->train.request.post_cursor[i]; in tegra_sor_dp_link_apply_training()
822 switch (link->train.pattern) { in tegra_sor_dp_link_apply_training()
/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dramgt215.c100 gt215_link_train_calc(u32 *vals, struct gt215_ltrain *train) in gt215_link_train_calc() argument
138 train->r_100720 = 0; in gt215_link_train_calc()
143 train->r_100720 |= ((median[i] & 0x0f) << (i << 2)); in gt215_link_train_calc()
146 train->r_1111e0 = 0x02000000 | (bin * 0x101); in gt215_link_train_calc()
147 train->r_111400 = 0x0; in gt215_link_train_calc()
156 struct gt215_ltrain *train = &ram->ltrain; in gt215_link_train() local
178 train->state = NVA3_TRAIN_EXEC; in gt215_link_train()
223 ram_wr32(fuc, 0x100720, train->r_100720); in gt215_link_train()
224 ram_wr32(fuc, 0x1111e0, train->r_1111e0); in gt215_link_train()
225 ram_wr32(fuc, 0x111400, train->r_111400); in gt215_link_train()
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Dramgk104.c1272 struct gk104_ram_train *train) in gk104_ram_train_type() argument
1278 struct nvbios_M0209S *remap = &train->remap; in gk104_ram_train_type()
1288 case 0x00: value = &train->type00; break; in gk104_ram_train_type()
1289 case 0x01: value = &train->type01; break; in gk104_ram_train_type()
1290 case 0x04: value = &train->type04; break; in gk104_ram_train_type()
1291 case 0x06: value = &train->type06; break; in gk104_ram_train_type()
1292 case 0x07: value = &train->type07; break; in gk104_ram_train_type()
1293 case 0x08: value = &train->type08; break; in gk104_ram_train_type()
1294 case 0x09: value = &train->type09; break; in gk104_ram_train_type()
1327 train->mask |= 1 << M0205E.type; in gk104_ram_train_type()
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/linux-5.19.10/Documentation/devicetree/bindings/pwm/
Dmicrochip,corepwm.yaml55 a minimum period pulse train whose High/Low average is that of the chosen duty
/linux-5.19.10/drivers/gpu/drm/xlnx/
Dzynqmp_dp.c662 u8 train = dp->train_set[i]; in zynqmp_dp_update_vs_emph() local
664 opts.dp.voltage[0] = (train & DP_TRAIN_VOLTAGE_SWING_MASK) in zynqmp_dp_update_vs_emph()
666 opts.dp.pre[0] = (train & DP_TRAIN_PRE_EMPHASIS_MASK) in zynqmp_dp_update_vs_emph()
/linux-5.19.10/Documentation/networking/
Dsnmp_counter.rst537 approached. The two pieces of information are ACK train length and
539 `Hybrid Slow Start paper`_. Either ACK train length or packet delay
550 How many times the ACK train length threshold is detected
554 The sum of CWND detected by ACK train length. Dividing this value by
556 ACK train length.
/linux-5.19.10/Documentation/process/
D2.Process.rst474 the kernel and the company both, and who can help to train others as well.
/linux-5.19.10/Documentation/admin-guide/hw-vuln/
Dspectre.rst174 An attacker can train the branch predictor to speculatively skip the