| /linux-5.19.10/Documentation/core-api/ |
| D | refcount-vs-atomic.rst | 42 stores (all po-earlier instructions) on the same CPU are completed
44 It also guarantees that all po-earlier stores on the same CPU
45 and all propagated stores from other CPUs must propagate to all
50 stores (all po-earlier instructions) on the same CPU are completed
52 stores on the same CPU and all propagated stores from other CPUs
58 stores (all po-later instructions) on the same CPU are
60 po-later stores on the same CPU must propagate to all other CPUs
67 then further stores are ordered against this operation.
68 Control dependency on stores are not implemented using any explicit
69 barriers, but rely on CPU not to speculate on stores. This is only
[all …]
|
| /linux-5.19.10/tools/memory-model/Documentation/ |
| D | control-dependencies.txt | 11 One such challenge is that control dependencies order only later stores.
31 However, stores are not speculated. This means that ordering is
43 the compiler might fuse the store to "b" with other stores. Worse yet,
60 identical stores on both branches of the "if" statement as follows:
104 guaranteed only when the stores differ, for example:
212 only to the stores in the then-clause and else-clause of the "if" statement
219 (*) Control dependencies can order prior loads against later stores.
221 Not prior loads against later loads, nor prior stores against
224 stores and later loads, smp_mb().
226 (*) If both legs of the "if" statement contain identical stores to
[all …]
|
| D | explanation.txt | 102 device, stores it in a buffer, and sets a flag to indicate the buffer
134 Thus, P0 stores the data in buf and then sets flag. Meanwhile, P1
140 This pattern of memory accesses, where one CPU stores values to two
197 it, as loads can obtain values only from earlier stores.
202 P1 must load 0 from buf before P0 stores 1 to it; otherwise r2
206 P0 stores 1 to buf before storing 1 to flag, since it executes
222 each CPU stores to its own shared location and then loads from the
270 W: P0 stores 1 to flag executes before
273 Z: P0 stores 1 to buf executes before
274 W: P0 stores 1 to flag.
[all …]
|
| D | recipes.txt | 46 tearing, load/store fusing, and invented loads and stores.
203 The MP pattern has one CPU execute a pair of stores to a pair of variables
310 The smp_wmb() macro orders prior stores against later stores, and the
354 second, while another CPU loads from the second variable and then stores
475 that one CPU first stores to one variable and then loads from a second,
476 while another CPU stores to the second variable and then loads from the
|
| /linux-5.19.10/tools/memory-model/litmus-tests/ |
| D | MP+unlocklockonceonce+fencermbonceonce.litmus | 6 * If two locked critical sections execute on the same CPU, stores in the
7 * first must propagate to each CPU before stores in the second do, even if
|
| /linux-5.19.10/fs/romfs/ |
| D | Kconfig | 20 # Select the backing stores to be supported
23 prompt "RomFS backing stores"
27 Select the backing stores to be supported.
|
| /linux-5.19.10/Documentation/userspace-api/media/v4l/ |
| D | pixfmt-yuv-planar.rst | 13 stores the Y components. The second plane is the chroma plane and stores the
273 ``V4L2_PIX_FMT_NV12MT_16X16`` is similar to ``V4L2_PIX_FMT_NV12M`` but stores
274 pixels in 2D 16x16 tiles, and stores tiles linearly in memory.
278 ``V4L2_PIX_FMT_NV12MT`` is similar to ``V4L2_PIX_FMT_NV12M`` but stores
279 pixels in 2D 64x32 tiles, and stores 2x2 groups of tiles in
287 ``V4L2_PIX_FMT_NV12_4L4`` stores pixels in 4x4 tiles, and stores
292 ``V4L2_PIX_FMT_NV12_16L16`` stores pixels in 16x16 tiles, and stores
297 ``V4L2_PIX_FMT_NV12_32L32`` stores pixels in 32x32 tiles, and stores
302 ``V4L2_PIX_FMT_NV12M_8L128`` is similar to ``V4L2_PIX_FMT_NV12M`` but stores
303 pixels in 2D 8x128 tiles, and stores tiles linearly in memory.
[all …]
|
| /linux-5.19.10/tools/lib/traceevent/Documentation/ |
| D | libtraceevent-field_read.txt | 20 raw _data_ and stores it in the _value_. The function sets the _value_ according
21 to the endianness of the raw data and the current machine and stores it in
|
| /linux-5.19.10/Documentation/devicetree/bindings/mfd/ |
| D | 88pm860x.txt | 13 - marvell,88pm860x-slave-addr: 88pm860x are two chips solution. <reg> stores the I2C address
14 of one chip, and this property stores the I2C address of
|
| /linux-5.19.10/Documentation/ABI/testing/ |
| D | sysfs-class-devfreq | 75 The /sys/class/devfreq/.../min_freq shows and stores
84 The /sys/class/devfreq/.../max_freq shows and stores
121 This ABI shows and stores the kind of work timer by users.
|
| D | sysfs-class-extcon | 35 The /sys/class/extcon/.../state shows and stores the cable
79 The /sys/class/extcon/.../cable.X/state shows and stores the
|
| /linux-5.19.10/tools/perf/Documentation/ |
| D | perf-mem.txt | 20 and stores are sampled. Use the -t option to limit to loads or stores.
|
| D | perf-c2c.txt | 139 cpu/mem-stores/P
144 cpu/mem-stores/
189 Total stores
254 Node{cpus %hitms %stores}
|
| /linux-5.19.10/arch/sparc/kernel/ |
| D | dtlb_prot.S | 20 membar #Sync ! Synchronize stores
|
| /linux-5.19.10/Documentation/leds/ |
| D | ledtrig-transient.rst | 121 echo n > duration stores timer value to be used upon next
124 echo 0 > duration stores timer value to be used upon next
127 echo 1 > state stores desired transient state LED_FULL to be
129 echo 0 > state stores desired transient state LED_OFF to be
|
| /linux-5.19.10/Documentation/litmus-tests/rcu/ |
| D | RCU+sync+read.litmus | 7 * sees all stores done in prior RCU read-side critical sections. Such
|
| /linux-5.19.10/Documentation/filesystems/ext4/ |
| D | inodes.rst | 6 In a regular UNIX filesystem, the inode stores all the metadata
13 directory entry. (Compare all this to FAT, which stores all the file
56 inode flag is set, this inode stores an extended attribute value and
62 EA_INODE inode flag is set, this inode stores an extended attribute
69 EA_INODE inode flag is set, this inode stores an extended attribute
283 - Inode stores a large extended attribute value in its data blocks
331 stores an extended attribute value and this field contains the upper 32
|
| /linux-5.19.10/Documentation/x86/ |
| D | xstate.rst | 25 ARCH_GET_XCOMP_SUPP stores the supported features in userspace storage of
32 ARCH_GET_XCOMP_PERM stores the features for which the userspace process
|
| /linux-5.19.10/Documentation/ |
| D | memory-barriers.txt | 177 Furthermore, the stores committed by a CPU to the memory system may not be
178 perceived by the loads made by another CPU in the same order as the stores were
247 (*) Overlapping loads and stores within a particular CPU will appear to be
264 (Loads and stores overlap if they are targeted at overlapping pieces of
275 (*) It _must_not_ be assumed that independent loads and stores will be issued
387 A write barrier is a partial ordering on stores only; it is not required
391 memory system as time progresses. All stores _before_ a write barrier
392 will occur _before_ all the stores after the write barrier.
408 only; it is not required to have any effect on stores, independent loads
412 committing sequences of stores to the memory system that the CPU being
[all …]
|
| /linux-5.19.10/Documentation/devicetree/bindings/power/reset/ |
| D | nvmem-reboot-mode.txt | 4 and stores it in a NVMEM cell named "reboot-mode". Then the bootloader
|
| /linux-5.19.10/arch/sparc/lib/ |
| D | M7memset.S | 167 ! Use long word stores.
179 and %o2, 63, %o3 ! %o3 = bytes left after blk stores.
187 ! initial cache-clearing stores
|
| /linux-5.19.10/arch/mips/include/asm/ |
| D | mips-r2-to-r6-emul.h | 23 u64 stores; member
|
| D | fpu_emulator.h | 27 unsigned long stores; member
|
| /linux-5.19.10/arch/mips/kernel/ |
| D | mips-r2-to-r6-emul.c | 1418 MIPS_R2_STATS(stores); in mipsr2_decoder()
1488 MIPS_R2_STATS(stores); in mipsr2_decoder()
1845 MIPS_R2_STATS(stores); in mipsr2_decoder()
1963 MIPS_R2_STATS(stores); in mipsr2_decoder()
2270 (unsigned long)__this_cpu_read(mipsr2emustats.stores), in mipsr2_emul_show()
2271 (unsigned long)__this_cpu_read(mipsr2bdemustats.stores)); in mipsr2_emul_show()
2326 __this_cpu_write((mipsr2emustats).stores, 0); in mipsr2_clear_show()
2327 __this_cpu_write((mipsr2bdemustats).stores, 0); in mipsr2_clear_show()
|
| /linux-5.19.10/Documentation/devicetree/bindings/powerpc/4xx/ |
| D | akebono.txt | 36 The Akebono board stores some board information such as the revision
|