Searched refs:shared_timings (Results 1 – 5 of 5) sorted by relevance
| /linux-5.19.10/drivers/gpu/drm/msm/dsi/phy/ |
| D | dsi_phy.c | 114 timing->shared_timings.clk_post = linear_inter(tmax, tmin, pcnt2, 0, in msm_dsi_dphy_timing_calc()
123 timing->shared_timings.clk_pre = temp >> 1; in msm_dsi_dphy_timing_calc()
124 timing->shared_timings.clk_pre_inc_by_2 = true; in msm_dsi_dphy_timing_calc()
126 timing->shared_timings.clk_pre = in msm_dsi_dphy_timing_calc()
128 timing->shared_timings.clk_pre_inc_by_2 = false; in msm_dsi_dphy_timing_calc()
136 timing->shared_timings.clk_pre, timing->shared_timings.clk_post, in msm_dsi_dphy_timing_calc()
137 timing->shared_timings.clk_pre_inc_by_2, timing->clk_zero, in msm_dsi_dphy_timing_calc()
226 timing->shared_timings.clk_post = in msm_dsi_dphy_timing_calc_v2()
237 timing->shared_timings.clk_pre = temp >> 1; in msm_dsi_dphy_timing_calc_v2()
238 timing->shared_timings.clk_pre_inc_by_2 = 1; in msm_dsi_dphy_timing_calc_v2()
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| D | dsi_phy.h | 72 struct msm_dsi_phy_shared_timings shared_timings; member
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| D | dsi_phy_7nm.c | 963 timing->shared_timings.clk_pre); in dsi_7nm_phy_enable()
966 timing->shared_timings.clk_post); in dsi_7nm_phy_enable()
985 timing->shared_timings.clk_pre); in dsi_7nm_phy_enable()
987 timing->shared_timings.clk_post); in dsi_7nm_phy_enable()
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| /linux-5.19.10/drivers/gpu/drm/msm/dsi/ |
| D | dsi_manager.c | 141 struct msm_dsi_phy_shared_timings *shared_timings) in enable_phy() argument
149 ret = msm_dsi_phy_enable(msm_dsi->phy, &clk_req, shared_timings); in enable_phy()
156 struct msm_dsi_phy_shared_timings shared_timings[DSI_MAX]) in dsi_mgr_phy_enable()
174 &shared_timings[DSI_CLOCK_MASTER]); in dsi_mgr_phy_enable()
178 &shared_timings[DSI_CLOCK_SLAVE]); in dsi_mgr_phy_enable()
186 ret = enable_phy(msm_dsi, &shared_timings[id]); in dsi_mgr_phy_enable()
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| D | dsi.h | 176 struct msm_dsi_phy_shared_timings *shared_timings);
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