/linux-5.19.10/Documentation/devicetree/bindings/arm/ ! |
D | secure.txt | 15 can be supported by prefixing the property name with "secure-". So for 16 instance "secure-foo" would override "foo". For property names with 18 "vendor,secure-foo". If there is no "secure-" property then the Secure 21 validly have "secure-" versions; this list will be enlarged on a 26 still be processed unmodified by existing Non-secure software (and in 32 secure- bindings only need to be used where both the Secure and Normal 38 - secure-status : specifies whether the device is present and usable 39 in the secure world. The combination of this with "status" allows 41 specified. If "secure-status" is not specified it defaults to the 47 secure-status = "okay"; /* visible in both */ [all …]
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/linux-5.19.10/Documentation/devicetree/bindings/crypto/ ! |
D | inside-secure-safexcel.txt | 4 - compatible: Should be "inside-secure,safexcel-eip197b", 5 "inside-secure,safexcel-eip197d" or 6 "inside-secure,safexcel-eip97ies". 21 - "inside-secure,safexcel-eip197" is equivalent to 22 "inside-secure,safexcel-eip197b". 23 - "inside-secure,safexcel-eip97" is equivalent to 24 "inside-secure,safexcel-eip97ies". 29 compatible = "inside-secure,safexcel-eip197b";
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/linux-5.19.10/Documentation/devicetree/bindings/iommu/ ! |
D | qcom,iommu.txt | 6 to non-secure vs secure interrupt line. 31 - qcom,iommu-secure-id : secure-id. 37 - "qcom,msm-iommu-v1-ns" : non-secure context bank 38 - "qcom,msm-iommu-v1-sec" : secure context bank 46 for routing of context bank irq's to secure vs non- 47 secure lines. (Ie. if the iommu contains secure 63 qcom,iommu-secure-id = <17>; 89 qcom,iommu-secure-id = <18>;
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D | msm,iommu-v0.txt | 12 support secure mode two interrupts must be specified, for non-secure and 13 secure mode, in that order. For instances that don't support secure mode a
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/linux-5.19.10/Documentation/devicetree/bindings/arm/amlogic/ ! |
D | amlogic,meson-gx-ao-secure.yaml | 5 $id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#" 15 secure firmware. 22 const: amlogic,meson-gx-ao-secure 29 - const: amlogic,meson-gx-ao-secure 50 ao-secure@140 { 51 compatible = "amlogic,meson-gx-ao-secure", "syscon";
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D | amlogic,meson-mx-secbus2.yaml | 16 The registers can be accessed directly when not running in "secure mode". 17 When "secure mode" is enabled then these registers have to be accessed 18 through secure monitor calls.
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/linux-5.19.10/Documentation/devicetree/bindings/mailbox/ ! |
D | ti,secure-proxy.yaml | 4 $id: http://devicetree.org/schemas/mailbox/ti,secure-proxy.yaml# 13 The Texas Instruments' secure proxy is a mailbox controller that has 25 const: ti,am654-secure-proxy 30 Contains the secure proxy thread ID used for the specific transfer path. 48 secure proxy thread in the form 'rx_<PID>'. 54 Contains the interrupt information for the Rx interrupt path for secure 71 compatible = "ti,am654-secure-proxy";
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/linux-5.19.10/Documentation/devicetree/bindings/arm/samsung/ ! |
D | samsung-secure-firmware.yaml | 4 $id: http://devicetree.org/schemas/arm/samsung/samsung-secure-firmware.yaml# 15 - const: samsung,secure-firmware 19 Address of non-secure SYSRAM used for communication with firmware. 31 compatible = "samsung,secure-firmware";
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/linux-5.19.10/Documentation/powerpc/ ! |
D | ultravisor.rst | 56 process is running in secure mode, MSR(S) bit 41. MSR(S)=1, process 57 is in secure mode, MSR(s)=0 process is in normal mode. 63 the VM it is returning to is secure. 101 * Memory is partitioned into secure and normal memory. Only processes 102 that are running in secure mode can access secure memory. 104 * The hardware does not allow anything that is not running secure to 105 access secure memory. This means that the Hypervisor cannot access 110 * I/O systems are not allowed to directly address secure memory. This 117 * When a process is running in secure mode all hypercalls 120 * When a process is in secure mode all interrupts go to the [all …]
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/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ ! |
D | amdgpu_ib.c | 139 bool secure; in amdgpu_ib_schedule() local 230 secure = false; in amdgpu_ib_schedule() 232 secure = ib->flags & AMDGPU_IB_FLAGS_SECURE; in amdgpu_ib_schedule() 233 amdgpu_ring_emit_frame_cntl(ring, true, secure); in amdgpu_ib_schedule() 240 if (secure != !!(ib->flags & AMDGPU_IB_FLAGS_SECURE)) { in amdgpu_ib_schedule() 241 amdgpu_ring_emit_frame_cntl(ring, false, secure); in amdgpu_ib_schedule() 242 secure = !secure; in amdgpu_ib_schedule() 243 amdgpu_ring_emit_frame_cntl(ring, true, secure); in amdgpu_ib_schedule() 252 amdgpu_ring_emit_frame_cntl(ring, false, secure); in amdgpu_ib_schedule()
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/linux-5.19.10/Documentation/devicetree/bindings/nvmem/ ! |
D | st,stm32-romem.yaml | 35 st,non-secure-otp: 37 This property explicits a factory programmed area that both secure 38 and non-secure worlds can access. It is needed when, by default, the 39 related area can only be reached by the secure world. 64 st,non-secure-otp;
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D | amlogic-efuse.txt | 7 - secure-monitor: phandle to the secure-monitor node 20 secure-monitor = <&sm>; 35 sm: secure-monitor {
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/linux-5.19.10/Documentation/devicetree/bindings/thermal/ ! |
D | amlogic,thermal.yaml | 31 amlogic,ao-secure: 32 description: phandle to the ao-secure syscon 43 - amlogic,ao-secure 56 amlogic,ao-secure = <&sec_AO>;
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/linux-5.19.10/Documentation/devicetree/bindings/rng/ ! |
D | omap_rng.yaml | 17 - inside-secure,safexcel-eip76 50 - inside-secure,safexcel-eip76 61 - inside-secure,safexcel-eip76 86 compatible = "inside-secure,safexcel-eip76";
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/linux-5.19.10/arch/arm64/boot/dts/tesla/ ! |
D | fsd.dtsi | 273 interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>, /* Global secure fault */ 274 <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>, /* Global non-secure fault */ 275 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, /* Combined secure interrupt */ 276 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, /* Combined non-secure interrupt */ 281 /* Per context non-secure context interrupts, 0-3 interrupts */ 293 interrupts = <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, /* Global secure fault */ 294 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, /* Global non-secure fault */ 295 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, /* Combined secure interrupt */ 296 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, /* Combined non-secure interrupt */ 305 /* Per context non-secure context interrupts, 0-7 interrupts */ [all …]
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/linux-5.19.10/fs/ ! |
D | anon_inodes.c | 82 bool secure) in __anon_inode_getfile() argument 90 if (secure) { in __anon_inode_getfile() 184 bool secure) in __anon_inode_getfd() argument 195 secure); in __anon_inode_getfd()
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/linux-5.19.10/Documentation/ABI/testing/ ! |
D | sysfs-secvar | 5 secureboot, thereby secure variables. It exposes interface 6 for reading/writing the secure variables 11 Description: This directory lists all the secure variables that are supported 24 Description: Each secure variable is represented as a directory named as
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/linux-5.19.10/arch/arm/crypto/ ! |
D | Kconfig | 17 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented 27 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented 37 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented 46 SHA-256 secure hash standard (DFIPS 180-2) implemented 54 SHA-256 secure hash standard (DFIPS 180-2) implemented 62 SHA-512 secure hash standard (DFIPS 180-2) implemented 109 Use a faster and more secure NEON based implementation of AES in CBC,
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/linux-5.19.10/arch/arm/mach-omap2/ ! |
D | Makefile | 16 secure-common = omap-smc.o omap-secure.o 19 obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) 20 obj-$(CONFIG_ARCH_OMAP4) += $(secure-common) 21 obj-$(CONFIG_SOC_AM33XX) += $(secure-common) 22 obj-$(CONFIG_SOC_OMAP5) += $(secure-common) 23 obj-$(CONFIG_SOC_AM43XX) += $(secure-common) 24 obj-$(CONFIG_SOC_DRA7XX) += $(secure-common)
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/linux-5.19.10/Documentation/staging/ ! |
D | tee.rst | 8 secure environment, for example, TrustZone on ARM CPUs, or a separate 9 secure co-processor etc. A TEE driver handles the details needed to 139 separate secure co-processor. 172 RPC (Remote Procedure Call) are requests from secure world to kernel driver 190 There are two kinds of notifications that secure world can use to make 195 2. Asynchronous notifications delivered with a combination of a non-secure 196 edge-triggered interrupt and a fast call from the non-secure interrupt 200 this is only usable when secure world is entered with a yielding call via 201 ``OPTEE_SMC_CALL_WITH_ARG``. This excludes such notifications from secure 204 An asynchronous notification is delivered via a non-secure edge-triggered [all …]
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/linux-5.19.10/arch/arm64/boot/dts/arm/ ! |
D | corstone1000.dtsi | 148 secure-status = "okay"; /* secure-world-only */ 160 secure-status = "okay"; /* secure-world-only */
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/linux-5.19.10/Documentation/devicetree/bindings/firmware/meson/ ! |
D | meson_sm.txt | 6 Required properties for the secure monitor node: 12 sm: secure-monitor {
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/linux-5.19.10/Documentation/driver-api/firmware/ ! |
D | other_interfaces.rst | 25 higher than the kernel is granted. Such secure features include 31 drivers to request access to the secure features. The requests are queued 33 of the requests on to a secure monitor (EL3).
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/linux-5.19.10/Documentation/devicetree/bindings/misc/ ! |
D | brcm,kona-smc.txt | 4 used for non-secure to secure communications.
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/linux-5.19.10/drivers/vfio/ ! |
D | Kconfig | 7 VFIO provides a framework for secure userspace device drivers. 37 considered secure. VFIO No-IOMMU mode enables IOMMU groups for 39 infrastructure in a non-secure mode. Use of this mode will result
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