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Searched refs:rvu (Results 1 – 18 of 18) sorted by relevance

/linux-5.19.10/drivers/net/ethernet/marvell/octeontx2/af/
Drvu.h53 struct rvu *rvu; member
78 struct rvu *rvu; member
104 struct rvu *rvu; member
312 struct rvu *rvu; member
369 struct rvu *rvu; member
437 struct rvu { struct
505 static inline void rvu_write64(struct rvu *rvu, u64 block, u64 offset, u64 val) in rvu_write64() argument
507 writeq(val, rvu->afreg_base + ((block << 28) | offset)); in rvu_write64()
510 static inline u64 rvu_read64(struct rvu *rvu, u64 block, u64 offset) in rvu_read64() argument
512 return readq(rvu->afreg_base + ((block << 28) | offset)); in rvu_read64()
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Drvu_cgx.c25 *otx2_mbox_alloc_msg_ ## _fn_name(struct rvu *rvu, int devid) \
30 &rvu->afpf_wq_info.mbox_up, devid, sizeof(struct _req_type), \
36 trace_otx2_msg_alloc(rvu->pdev, _id, sizeof(*req)); \
43 bool is_mac_feature_supported(struct rvu *rvu, int pf, int feature) in is_mac_feature_supported() argument
48 if (!is_pf_cgxmapped(rvu, pf)) in is_mac_feature_supported()
51 rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id); in is_mac_feature_supported()
52 cgxd = rvu_cgx_pdata(cgx_id, rvu); in is_mac_feature_supported()
58 static u16 cgxlmac_to_pfmap(struct rvu *rvu, u8 cgx_id, u8 lmac_id) in cgxlmac_to_pfmap() argument
60 return rvu->cgxlmac2pf_map[CGX_OFFSET(cgx_id) + lmac_id]; in cgxlmac_to_pfmap()
63 int cgxlmac_to_pf(struct rvu *rvu, int cgx_id, int lmac_id) in cgxlmac_to_pf() argument
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Drvu.c25 static int rvu_get_hwvf(struct rvu *rvu, int pcifunc);
27 static void rvu_set_msix_offset(struct rvu *rvu, struct rvu_pfvf *pfvf,
29 static void rvu_clear_msix_offset(struct rvu *rvu, struct rvu_pfvf *pfvf,
31 static void __rvu_flr_handler(struct rvu *rvu, u16 pcifunc);
33 static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,
61 static void rvu_setup_hw_capabilities(struct rvu *rvu) in rvu_setup_hw_capabilities() argument
63 struct rvu_hwinfo *hw = rvu->hw; in rvu_setup_hw_capabilities()
71 hw->rvu = rvu; in rvu_setup_hw_capabilities()
73 if (is_rvu_pre_96xx_C0(rvu)) { in rvu_setup_hw_capabilities()
80 if (is_rvu_96xx_A0(rvu) || is_rvu_95xx_A0(rvu)) in rvu_setup_hw_capabilities()
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Drvu_cpt.c29 reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_STS(e)); \
43 struct rvu *rvu = block->rvu; in rvu_cpt_af_flt_intr_handler() local
47 reg0 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(0)); in rvu_cpt_af_flt_intr_handler()
48 reg1 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(1)); in rvu_cpt_af_flt_intr_handler()
49 if (!is_rvu_otx2(rvu)) { in rvu_cpt_af_flt_intr_handler()
50 reg2 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(2)); in rvu_cpt_af_flt_intr_handler()
51 dev_err_ratelimited(rvu->dev, in rvu_cpt_af_flt_intr_handler()
55 dev_err_ratelimited(rvu->dev, in rvu_cpt_af_flt_intr_handler()
60 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT(0), reg0); in rvu_cpt_af_flt_intr_handler()
61 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT(1), reg1); in rvu_cpt_af_flt_intr_handler()
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Drvu_nix.c18 static void nix_free_tx_vtag_entries(struct rvu *rvu, u16 pcifunc);
19 static int rvu_nix_get_bpid(struct rvu *rvu, struct nix_bp_cfg_req *req,
21 static int nix_update_mce_rule(struct rvu *rvu, u16 pcifunc,
23 static int nix_setup_ipolicers(struct rvu *rvu,
25 static void nix_ipolicer_freemem(struct rvu *rvu, struct nix_hw *nix_hw);
28 static int nix_free_all_bandprof(struct rvu *rvu, u16 pcifunc);
29 static void nix_clear_ratelimit_aggr(struct rvu *rvu, struct nix_hw *nix_hw,
81 int rvu_get_next_nix_blkaddr(struct rvu *rvu, int blkaddr) in rvu_get_next_nix_blkaddr() argument
87 return rvu->nix_blkaddr[blkaddr]; in rvu_get_next_nix_blkaddr()
90 if (rvu->nix_blkaddr[i] == blkaddr) in rvu_get_next_nix_blkaddr()
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Drvu_devlink.c38 static bool rvu_common_request_irq(struct rvu *rvu, int offset, in rvu_common_request_irq() argument
41 struct rvu_devlink *rvu_dl = rvu->rvu_dl; in rvu_common_request_irq()
44 sprintf(&rvu->irq_name[offset * NAME_SIZE], "%s", name); in rvu_common_request_irq()
45 rc = request_irq(pci_irq_vector(rvu->pdev, offset), fn, 0, in rvu_common_request_irq()
46 &rvu->irq_name[offset * NAME_SIZE], rvu_dl); in rvu_common_request_irq()
48 dev_warn(rvu->dev, "Failed to register %s irq\n", name); in rvu_common_request_irq()
50 rvu->irq_allocated[offset] = true; in rvu_common_request_irq()
52 return rvu->irq_allocated[offset]; in rvu_common_request_irq()
69 struct rvu *rvu; in rvu_nix_af_rvu_intr_handler() local
73 rvu = rvu_dl->rvu; in rvu_nix_af_rvu_intr_handler()
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Drvu_cn10k.c20 static int lmtst_map_table_ops(struct rvu *rvu, u32 index, u64 *val, in lmtst_map_table_ops() argument
26 tbl_base = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_MAP_BASE); in lmtst_map_table_ops()
30 dev_err(rvu->dev, "Failed to setup lmt map table mapping!!\n"); in lmtst_map_table_ops()
43 rvu_write64(rvu, BLKADDR_APR, APR_AF_LMT_CTL, BIT_ULL(0)); in lmtst_map_table_ops()
44 rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CTL); in lmtst_map_table_ops()
45 rvu_write64(rvu, BLKADDR_APR, APR_AF_LMT_CTL, 0x00); in lmtst_map_table_ops()
53 static u32 rvu_get_lmtst_tbl_index(struct rvu *rvu, u16 pcifunc) in rvu_get_lmtst_tbl_index() argument
55 return ((rvu_get_pf(pcifunc) * rvu->hw->total_vfs) + in rvu_get_lmtst_tbl_index()
59 static int rvu_get_lmtaddr(struct rvu *rvu, u16 pcifunc, in rvu_get_lmtaddr() argument
66 dev_err(rvu->dev, "%s Requested Null address for transulation\n", __func__); in rvu_get_lmtaddr()
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Drvu_npc.c31 static void npc_mcam_free_all_entries(struct rvu *rvu, struct npc_mcam *mcam,
33 static void npc_mcam_free_all_counters(struct rvu *rvu, struct npc_mcam *mcam,
46 bool is_npc_interface_valid(struct rvu *rvu, u8 intf) in is_npc_interface_valid() argument
48 struct rvu_hwinfo *hw = rvu->hw; in is_npc_interface_valid()
53 int rvu_npc_get_tx_nibble_cfg(struct rvu *rvu, u64 nibble_ena) in rvu_npc_get_tx_nibble_cfg() argument
58 if (is_rvu_96xx_B0(rvu)) in rvu_npc_get_tx_nibble_cfg()
63 static int npc_mcam_verify_pf_func(struct rvu *rvu, in npc_mcam_verify_pf_func() argument
85 void rvu_npc_set_pkind(struct rvu *rvu, int pkind, struct rvu_pfvf *pfvf) in rvu_npc_set_pkind() argument
90 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0); in rvu_npc_set_pkind()
96 rvu_write64(rvu, blkaddr, NPC_AF_PKINDX_CPI_DEFX(pkind, 0), val); in rvu_npc_set_pkind()
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Drvu_switch.c11 static int rvu_switch_install_rx_rule(struct rvu *rvu, u16 pcifunc, in rvu_switch_install_rx_rule() argument
18 pfvf = rvu_get_pfvf(rvu, pcifunc); in rvu_switch_install_rx_rule()
37 return rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp); in rvu_switch_install_rx_rule()
40 static int rvu_switch_install_tx_rule(struct rvu *rvu, u16 pcifunc, u16 entry) in rvu_switch_install_tx_rule() argument
47 pfvf = rvu_get_pfvf(rvu, pcifunc); in rvu_switch_install_tx_rule()
67 return rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp); in rvu_switch_install_tx_rule()
70 static int rvu_switch_install_rules(struct rvu *rvu) in rvu_switch_install_rules() argument
72 struct rvu_switch *rswitch = &rvu->rswitch; in rvu_switch_install_rules()
74 struct rvu_hwinfo *hw = rvu->hw; in rvu_switch_install_rules()
80 if (!is_pf_cgxmapped(rvu, pf)) in rvu_switch_install_rules()
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Drvu_npa.c15 static int npa_aq_enqueue_wait(struct rvu *rvu, struct rvu_block *block, in npa_aq_enqueue_wait() argument
26 reg = rvu_read64(rvu, block->addr, NPA_AF_AQ_STATUS); in npa_aq_enqueue_wait()
36 rvu_write64(rvu, block->addr, NPA_AF_AQ_DOOR, 1); in npa_aq_enqueue_wait()
52 int rvu_npa_aq_enq_inst(struct rvu *rvu, struct npa_aq_enq_req *req, in rvu_npa_aq_enq_inst() argument
55 struct rvu_hwinfo *hw = rvu->hw; in rvu_npa_aq_enq_inst()
65 pfvf = rvu_get_pfvf(rvu, pcifunc); in rvu_npa_aq_enq_inst()
69 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, pcifunc); in rvu_npa_aq_enq_inst()
76 dev_warn(rvu->dev, "%s: NPA AQ not initialized\n", __func__); in rvu_npa_aq_enq_inst()
80 npalf = rvu_get_lf(rvu, block, pcifunc, 0); in rvu_npa_aq_enq_inst()
149 rc = npa_aq_enqueue_wait(rvu, block, &inst); in rvu_npa_aq_enq_inst()
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Drvu_debugfs.c199 #define NDC_MAX_BANK(rvu, blk_addr) (rvu_read64(rvu, \ argument
235 struct rvu *rvu = filp->private_data; in rvu_dbg_lmtst_map_table_display() local
253 tbl_base = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_MAP_BASE); in rvu_dbg_lmtst_map_table_display()
257 dev_err(rvu->dev, "Failed to setup lmt map table mapping!!\n"); in rvu_dbg_lmtst_map_table_display()
273 for (pf = 0; pf < rvu->hw->total_pfs; pf++) { in rvu_dbg_lmtst_map_table_display()
277 index = pf * rvu->hw->total_vfs * LMT_MAPTBL_ENTRY_SIZE; in rvu_dbg_lmtst_map_table_display()
288 rvu_get_pf_numvfs(rvu, pf, &num_vfs, &hw_vfs); in rvu_dbg_lmtst_map_table_display()
290 index = (pf * rvu->hw->total_vfs * 16) + in rvu_dbg_lmtst_map_table_display()
356 static int get_max_column_width(struct rvu *rvu) in get_max_column_width() argument
367 for (pf = 0; pf < rvu->hw->total_pfs; pf++) { in get_max_column_width()
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Drvu_npc_fs.c113 static bool npc_is_field_present(struct rvu *rvu, enum key_fields type, u8 intf) in npc_is_field_present() argument
115 struct npc_mcam *mcam = &rvu->hw->mcam; in npc_is_field_present()
172 static bool npc_check_overlap(struct rvu *rvu, int blkaddr, in npc_check_overlap() argument
175 struct npc_mcam *mcam = &rvu->hw->mcam; in npc_check_overlap()
192 cfg = rvu_read64(rvu, blkaddr, in npc_check_overlap()
221 static bool npc_check_field(struct rvu *rvu, int blkaddr, enum key_fields type, in npc_check_field() argument
224 if (!npc_is_field_present(rvu, type, intf) || in npc_check_field()
225 npc_check_overlap(rvu, blkaddr, type, 0, intf)) in npc_check_field()
282 static void npc_handle_multi_layer_fields(struct rvu *rvu, int blkaddr, u8 intf) in npc_handle_multi_layer_fields() argument
284 struct npc_mcam *mcam = &rvu->hw->mcam; in npc_handle_multi_layer_fields()
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Drvu_sdp.c49 int rvu_sdp_init(struct rvu *rvu) in rvu_sdp_init() argument
60 pfvf = &rvu->pf[sdp_pf_num[i]]; in rvu_sdp_init()
62 pfvf->sdp_info = devm_kzalloc(rvu->dev, in rvu_sdp_init()
68 dev_info(rvu->dev, "SDP PF number:%d\n", sdp_pf_num[i]); in rvu_sdp_init()
78 rvu_mbox_handler_set_sdp_chan_info(struct rvu *rvu, in rvu_mbox_handler_set_sdp_chan_info() argument
82 struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc); in rvu_mbox_handler_set_sdp_chan_info()
85 dev_info(rvu->dev, "AF: SDP%d max_vfs %d num_pf_rings %d pf_srn %d\n", in rvu_mbox_handler_set_sdp_chan_info()
92 rvu_mbox_handler_get_sdp_chan_info(struct rvu *rvu, struct msg_req *req, in rvu_mbox_handler_get_sdp_chan_info() argument
95 struct rvu_hwinfo *hw = rvu->hw; in rvu_mbox_handler_get_sdp_chan_info()
102 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0); in rvu_mbox_handler_get_sdp_chan_info()
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Drvu_devlink.h72 struct rvu *rvu; member
79 int rvu_register_dl(struct rvu *rvu);
80 void rvu_unregister_dl(struct rvu *rvu);
Dptp.c395 int rvu_mbox_handler_ptp_op(struct rvu *rvu, struct ptp_req *req, in rvu_mbox_handler_ptp_op() argument
407 if (!rvu->ptp) in rvu_mbox_handler_ptp_op()
412 err = ptp_adjfine(rvu->ptp, req->scaled_ppm); in rvu_mbox_handler_ptp_op()
415 err = ptp_get_clock(rvu->ptp, &rsp->clk); in rvu_mbox_handler_ptp_op()
418 err = ptp_get_tstmp(rvu->ptp, &rsp->clk); in rvu_mbox_handler_ptp_op()
421 err = ptp_set_thresh(rvu->ptp, req->thresh); in rvu_mbox_handler_ptp_op()
Drvu_reg.h606 if (rvu->hw->npc_ext_set) \
614 if (rvu->hw->npc_ext_set) \
622 if (rvu->hw->npc_ext_set) \
630 if (rvu->hw->npc_ext_set) \
638 if (rvu->hw->npc_ext_set) \
646 if (rvu->hw->npc_ext_set) \
654 if (rvu->hw->npc_ext_set) \
662 if (rvu->hw->npc_ext_set) \
DMakefile11 rvu_af-y := cgx.o rvu.o rvu_cgx.o rvu_npa.o rvu_nix.o \
Drvu_trace.h9 #define TRACE_SYSTEM rvu