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Searched refs:regPWRSEQ1_PWRSEQ_SPARE (Results 1 – 6 of 6) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dpcs/
Ddpcs_4_2_0_offset.h130 #define regPWRSEQ1_PWRSEQ_SPARE … macro
Ddpcs_4_2_2_offset.h117 #define regPWRSEQ1_PWRSEQ_SPARE … macro
Ddpcs_4_2_3_offset.h134 #define regPWRSEQ1_PWRSEQ_SPARE … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_2_offset.h12465 #define regPWRSEQ1_PWRSEQ_SPARE … macro
Ddcn_3_1_5_offset.h12330 #define regPWRSEQ1_PWRSEQ_SPARE … macro
Ddcn_3_1_6_offset.h13061 #define regPWRSEQ1_PWRSEQ_SPARE … macro