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Searched refs:regMC_VM_MX_L1_TLB_CNTL (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/
Dmmhub_v1_7.c160 tmp = RREG32_SOC15(MMHUB, 0, regMC_VM_MX_L1_TLB_CNTL); in mmhub_v1_7_init_tlb_regs()
172 WREG32_SOC15(MMHUB, 0, regMC_VM_MX_L1_TLB_CNTL, tmp); in mmhub_v1_7_init_tlb_regs()
361 tmp = RREG32_SOC15(MMHUB, 0, regMC_VM_MX_L1_TLB_CNTL); in mmhub_v1_7_gart_disable()
367 WREG32_SOC15(MMHUB, 0, regMC_VM_MX_L1_TLB_CNTL, tmp); in mmhub_v1_7_gart_disable()
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/mmhub/
Dmmhub_1_7_offset.h5122 #define regMC_VM_MX_L1_TLB_CNTL macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h7388 #define regMC_VM_MX_L1_TLB_CNTL macro