Home
last modified time | relevance | path

Searched refs:regDSCL1_SCL_TAP_CONTROL_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_2_offset.h4462 #define regDSCL1_SCL_TAP_CONTROL_BASE_IDX … macro
Ddcn_3_1_5_offset.h4221 #define regDSCL1_SCL_TAP_CONTROL_BASE_IDX … macro
Ddcn_3_1_6_offset.h4682 #define regDSCL1_SCL_TAP_CONTROL_BASE_IDX … macro