Searched refs:recout_width (Results 1 – 12 of 12) sorted by relevance
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
D | display_rq_dlg_calc_20.c | 122 unsigned int recout_width, in get_refcyc_per_delivery() argument 134 * dml_min((double) recout_width, (double) hactive / 2.0) in get_refcyc_per_delivery() 137 refcyc_per_delivery = (double) refclk_freq_in_mhz * (double) recout_width in get_refcyc_per_delivery() 146 dml_print("DML_DLG: %s: recout_width = %d\n", __func__, recout_width); in get_refcyc_per_delivery() 1214 full_recout_width = dst->recout_width * 2; // assume half split for dcn1 in dml20_rq_dlg_get_dlg_params() 1218 full_recout_width = dst->recout_width; in dml20_rq_dlg_get_dlg_params()
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D | display_rq_dlg_calc_20v2.c | 122 unsigned int recout_width, in get_refcyc_per_delivery() argument 134 * dml_min((double) recout_width, (double) hactive / 2.0) in get_refcyc_per_delivery() 137 refcyc_per_delivery = (double) refclk_freq_in_mhz * (double) recout_width in get_refcyc_per_delivery() 146 dml_print("DML_DLG: %s: recout_width = %d\n", __func__, recout_width); in get_refcyc_per_delivery() 1215 full_recout_width = dst->recout_width * 2; // assume half split for dcn1 in dml20v2_rq_dlg_get_dlg_params() 1219 full_recout_width = dst->recout_width; in dml20v2_rq_dlg_get_dlg_params()
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D | dcn20_fpu.c | 1166 …pipes[pipe_cnt].pipe.dest.recout_width = pipes[pipe_cnt].pipe.src.viewport_width; /*vp_width/hrati… in dcn20_populate_dml_pipes_from_context() 1168 …pipes[pipe_cnt].pipe.dest.full_recout_width = pipes[pipe_cnt].pipe.dest.recout_width; /*when is_h… in dcn20_populate_dml_pipes_from_context() 1181 pipes[pipe_cnt].pipe.dest.recout_width /= 2; in dcn20_populate_dml_pipes_from_context() 1184 pipes[pipe_cnt].pipe.dest.recout_width /= 4; in dcn20_populate_dml_pipes_from_context() 1227 pipes[pipe_cnt].pipe.dest.recout_width = scl->recout.width; in dcn20_populate_dml_pipes_from_context()
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/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
D | display_rq_dlg_calc_21.c | 98 unsigned int recout_width, in get_refcyc_per_delivery() argument 110 * dml_min((double) recout_width, (double) hactive / 2.0) in get_refcyc_per_delivery() 113 refcyc_per_delivery = (double) refclk_freq_in_mhz * (double) recout_width in get_refcyc_per_delivery() 122 dml_print("DML_DLG: %s: recout_width = %d\n", __func__, recout_width); in get_refcyc_per_delivery() 1267 full_recout_width = dst->recout_width * 2; // assume half split for dcn1 in dml_rq_dlg_get_dlg_params() 1271 full_recout_width = dst->recout_width; in dml_rq_dlg_get_dlg_params()
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/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/ |
D | dml1_display_rq_dlg_calc.c | 101 unsigned int recout_width, in get_refcyc_per_delivery() argument 110 refcyc_per_delivery = (double) refclk_freq_in_mhz * (double) recout_width in get_refcyc_per_delivery() 119 DTRACE("DLG: %s: recout_width = %d", __func__, recout_width); in get_refcyc_per_delivery() 1281 + e2e_pipe_param->pipe.dest.recout_width; in dml1_rq_dlg_get_dlg_params() 1652 full_recout_width = e2e_pipe_param->pipe.dest.recout_width * 2; /* assume half split for dcn1 */ in dml1_rq_dlg_get_dlg_params() 1656 full_recout_width = e2e_pipe_param->pipe.dest.recout_width; in dml1_rq_dlg_get_dlg_params()
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D | display_mode_structs.h | 339 unsigned int recout_width; member
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D | display_mode_lib.c | 197 dml_print("DML PARAMS: recout_width = %d\n", pipe_dest->recout_width); in dml_log_pipe_params()
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D | dml_wrapper.c | 836 pipe->dest.recout_width = pipe->src.viewport_width; in populate_default_plane_from_timing() 838 pipe->dest.full_recout_width = pipe->dest.recout_width; in populate_default_plane_from_timing() 851 pipe->dest.recout_width /= 2; in populate_default_plane_from_timing() 854 pipe->dest.recout_width /= 4; in populate_default_plane_from_timing() 945 e2e_pipe->pipe.dest.recout_width = scl->recout.width; in populate_dml_from_dc_pipe_ctx()
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D | display_mode_vba.c | 472 …dst->recout_width; // TODO: or should this be full_recout_width???...maybe only when in hsplit mod… in fetch_pipe_params() 648 dst_k->recout_width; in fetch_pipe_params()
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/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
D | display_rq_dlg_calc_30.c | 47 unsigned int recout_width, in get_refcyc_per_delivery() argument 59 * dml_min((double)recout_width, (double)hactive / ((unsigned int)odm_combine*2)) in get_refcyc_per_delivery() 62 refcyc_per_delivery = (double)refclk_freq_in_mhz * (double)recout_width in get_refcyc_per_delivery() 71 dml_print("DML_DLG: %s: recout_width = %d\n", __func__, recout_width); in get_refcyc_per_delivery() 1456 full_recout_width = dst->recout_width * 2; // assume half split for dcn1 in dml_rq_dlg_get_dlg_params() 1460 full_recout_width = dst->recout_width; in dml_rq_dlg_get_dlg_params()
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/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
D | display_rq_dlg_calc_31.c | 134 unsigned int recout_width, in get_refcyc_per_delivery() argument 146 …* dml_min((double) recout_width, (double) hactive / ((unsigned int) odm_combine * 2)) / pclk_freq_… in get_refcyc_per_delivery() 148 …refcyc_per_delivery = (double) refclk_freq_in_mhz * (double) recout_width / pclk_freq_in_mhz / (do… in get_refcyc_per_delivery() 156 dml_print("DML_DLG: %s: recout_width = %d\n", __func__, recout_width); in get_refcyc_per_delivery() 1332 full_recout_width = dst->recout_width * 2; // assume half split for dcn1 in dml_rq_dlg_get_dlg_params() 1336 full_recout_width = dst->recout_width; in dml_rq_dlg_get_dlg_params()
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/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
D | dcn_calcs.c | 425 input->dest.recout_width = pipe->plane_res.scl_data.recout.width; in pipe_ctx_to_e2e_pipe_params()
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