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Searched refs:priv2 (Results 1 – 13 of 13) sorted by relevance

/linux-5.19.10/arch/powerpc/platforms/cell/spufs/
Dswitch.c169 struct spu_priv2 __iomem *priv2 = spu->priv2; in save_mfc_cntl() local
174 switch (in_be64(&priv2->mfc_control_RW) & in save_mfc_cntl()
177 POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) & in save_mfc_cntl()
183 csa->priv2.mfc_control_RW = in save_mfc_cntl()
184 in_be64(&priv2->mfc_control_RW) | in save_mfc_cntl()
188 out_be64(&priv2->mfc_control_RW, MFC_CNTL_SUSPEND_DMA_QUEUE); in save_mfc_cntl()
189 POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) & in save_mfc_cntl()
193 csa->priv2.mfc_control_RW = in save_mfc_cntl()
194 in_be64(&priv2->mfc_control_RW) & in save_mfc_cntl()
249 struct spu_priv2 __iomem *priv2 = spu->priv2; in save_mfc_stopped_status() local
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Dhw_ops.c86 struct spu_priv2 __iomem *priv2 = spu->priv2; in spu_hw_ibox_read() local
92 *data = in_be64(&priv2->puint_mb_R); in spu_hw_ibox_read()
137 struct spu_priv2 __iomem *priv2 = spu->priv2; in spu_hw_signal1_type_set() local
141 tmp = in_be64(&priv2->spu_cfg_RW); in spu_hw_signal1_type_set()
146 out_be64(&priv2->spu_cfg_RW, tmp); in spu_hw_signal1_type_set()
152 return ((in_be64(&ctx->spu->priv2->spu_cfg_RW) & 1) != 0); in spu_hw_signal1_type_get()
158 struct spu_priv2 __iomem *priv2 = spu->priv2; in spu_hw_signal2_type_set() local
162 tmp = in_be64(&priv2->spu_cfg_RW); in spu_hw_signal2_type_set()
167 out_be64(&priv2->spu_cfg_RW, tmp); in spu_hw_signal2_type_set()
173 return ((in_be64(&ctx->spu->priv2->spu_cfg_RW) & 2) != 0); in spu_hw_signal2_type_get()
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Dbacking_ops.c125 *data = ctx->csa.priv2.puint_mb_R; in spu_backing_ibox_read()
178 if (ctx->csa.priv2.spu_cfg_RW & 0x1) in spu_backing_signal1_write()
195 if (ctx->csa.priv2.spu_cfg_RW & 0x2) in spu_backing_signal2_write()
209 tmp = ctx->csa.priv2.spu_cfg_RW; in spu_backing_signal1_type_set()
214 ctx->csa.priv2.spu_cfg_RW = tmp; in spu_backing_signal1_type_set()
220 return ((ctx->csa.priv2.spu_cfg_RW & 1) != 0); in spu_backing_signal1_type_get()
228 tmp = ctx->csa.priv2.spu_cfg_RW; in spu_backing_signal2_type_set()
233 ctx->csa.priv2.spu_cfg_RW = tmp; in spu_backing_signal2_type_set()
239 return ((ctx->csa.priv2.spu_cfg_RW & 2) != 0); in spu_backing_signal2_type_get()
264 ctx->csa.priv2.spu_privcntl_RW = val; in spu_backing_privcntl_write()
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Dfile.c1803 ctx->csa.priv2.mfc_control_RW |= MFC_CNTL_DECREMENTER_RUNNING; in spufs_decr_status_set()
1805 ctx->csa.priv2.mfc_control_RW &= ~MFC_CNTL_DECREMENTER_RUNNING; in spufs_decr_status_set()
1813 if (ctx->csa.priv2.mfc_control_RW & MFC_CNTL_DECREMENTER_RUNNING) in spufs_decr_status_get()
1915 return ctx->csa.priv2.spu_lslr_RW; in spufs_lslr_get()
1994 return spufs_dump_emit(cprm, &ctx->csa.priv2.puint_mb_R, in spufs_ibox_info_dump()
1995 sizeof(ctx->csa.priv2.puint_mb_R)); in spufs_ibox_info_dump()
2010 data = ctx->csa.priv2.puint_mb_R; in spufs_ibox_info_read()
2070 info->dma_info_type = ctx->csa.priv2.spu_tag_status_query_RW; in spufs_get_dma_info()
2077 struct mfc_cq_sr *spuqp = &ctx->csa.priv2.spuq[i]; in spufs_get_dma_info()
2131 struct mfc_cq_sr *puqp = &ctx->csa.priv2.puq[i]; in spufs_get_proxydma_info()
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Drun.c104 mfc_cntl = &ctx->spu->priv2->mfc_control_RW; in spu_setup_isolated()
/linux-5.19.10/arch/powerpc/platforms/cell/
Dspu_base.c67 struct spu_priv2 __iomem *priv2 = spu->priv2; in spu_invalidate_slbs() local
72 out_be64(&priv2->slb_invalidate_all_W, 0UL); in spu_invalidate_slbs()
124 struct spu_priv2 __iomem *priv2 = spu->priv2; in spu_restart_dma() local
127 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND); in spu_restart_dma()
136 struct spu_priv2 __iomem *priv2 = spu->priv2; in spu_load_slb() local
141 out_be64(&priv2->slb_index_W, slbe); in spu_load_slb()
143 out_be64(&priv2->slb_esid_RW, 0); in spu_load_slb()
145 out_be64(&priv2->slb_vsid_RW, slb->vsid); in spu_load_slb()
147 out_be64(&priv2->slb_esid_RW, slb->esid); in spu_load_slb()
452 struct spu_priv2 __iomem *priv2; in spu_init_channels() local
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Dspu_manage.c63 iounmap(spu->priv2); in spu_unmap()
151 spu->priv2 = spu_map_prop_old(spu, node, "priv2"); in spu_map_device_old()
152 if (!spu->priv2) in spu_map_device_old()
233 ret = spu_map_resource(spu, 2, (void __iomem**)&spu->priv2, NULL); in spu_map_device()
252 pr_debug(" priv2 : 0x%p\n", spu->priv2); in spu_map_device()
334 spu->priv2, spu->number); in of_create_spu()
/linux-5.19.10/arch/powerpc/platforms/ps3/
Dspu.c123 static void _dump_areas(unsigned int spe_id, unsigned long priv2, in _dump_areas() argument
128 pr_debug("%s:%d: priv2: %lxh\n", func, line, priv2); in _dump_areas()
177 iounmap(spu->priv2); in spu_unmap()
218 spu->priv2 = ioremap(spu_pdata(spu)->priv2_addr, in setup_areas()
221 if (!spu->priv2) { in setup_areas()
229 dump_areas(spu_pdata(spu)->spe_id, (unsigned long)spu->priv2, in setup_areas()
/linux-5.19.10/arch/powerpc/include/asm/
Dspu_csa.h233 struct spu_priv2_collapsed priv2; member
Dspu.h114 struct spu_priv2 __iomem *priv2; member
/linux-5.19.10/drivers/usb/gadget/function/
Duvc_configfs.c1906 void *priv2, void *priv3, in __uvcg_iter_strm_cls() argument
1919 ret = fun(h, priv2, priv3, 0, UVCG_HEADER); in __uvcg_iter_strm_cls()
1923 ret = fun(f->fmt, priv2, priv3, i++, UVCG_FORMAT); in __uvcg_iter_strm_cls()
1929 ret = fun(frm, priv2, priv3, j++, UVCG_FRAME); in __uvcg_iter_strm_cls()
1946 static int __uvcg_cnt_strm(void *priv1, void *priv2, void *priv3, int n, in __uvcg_cnt_strm() argument
1949 size_t *size = priv2; in __uvcg_cnt_strm()
2002 static int __uvcg_fill_strm(void *priv1, void *priv2, void *priv3, int n, in __uvcg_fill_strm() argument
2005 void **dest = priv2; in __uvcg_fill_strm()
/linux-5.19.10/include/trace/events/
Dext4.h2658 TP_PROTO(struct super_block *sb, int tag, int ino, int priv1, int priv2),
2660 TP_ARGS(sb, tag, ino, priv1, priv2),
2667 __field(int, priv2)
2675 __entry->priv2 = priv2;
2680 __entry->tag, __entry->ino, __entry->priv1, __entry->priv2)
/linux-5.19.10/arch/powerpc/xmon/
Dxmon.c4283 DUMP_FIELD(spu, "0x%p", priv2); in dump_spu_fields()