Searched refs:prcmu_base (Results 1 – 3 of 3) sorted by relevance
51 #define PRCM_ARM_PLLDIVPS (prcmu_base + 0x118)55 #define PRCM_PLLARM_LOCKP (prcmu_base + 0x0a8)58 #define PRCM_ARM_CHGCLKREQ (prcmu_base + 0x114)62 #define PRCM_PLLARM_ENABLE (prcmu_base + 0x98)66 #define PRCM_ARMCLKFIX_MGT (prcmu_base + 0x0)67 #define PRCM_A9PL_FORCE_CLKEN (prcmu_base + 0x19C)68 #define PRCM_A9_RESETN_CLR (prcmu_base + 0x1f4)69 #define PRCM_A9_RESETN_SET (prcmu_base + 0x1f0)70 #define PRCM_ARM_LS_CLAMP (prcmu_base + 0x30c)71 #define PRCM_SRAM_A9 (prcmu_base + 0x308)[all …]
450 static __iomem void *prcmu_base; variable546 return readl(prcmu_base + reg); in db8500_prcmu_read()554 writel(value, (prcmu_base + reg)); in db8500_prcmu_write()564 val = readl(prcmu_base + reg); in db8500_prcmu_write_masked()566 writel(val, (prcmu_base + reg)); in db8500_prcmu_write_masked()873 val = readl(prcmu_base + clock_reg[i]); in request_even_slower_clocks()889 writel(val, prcmu_base + clock_reg[i]); in request_even_slower_clocks()1256 val = readl(prcmu_base + clk_mgt[clock].offset); in request_clock()1263 writel(val, prcmu_base + clk_mgt[clock].offset); in request_clock()1439 val = readl(prcmu_base + clk_mgt[clock].offset); in clock_rate()[all …]
22 #define PRCM_ARM_WFI_STANDBY (prcmu_base + 0x130)25 #define PRCM_IOCR (prcmu_base + 0x310)29 #define PRCM_A9_MASK_REQ (prcmu_base + 0x328)32 #define PRCM_A9_MASK_ACK (prcmu_base + 0x32c)33 #define PRCM_ARMITMSK31TO0 (prcmu_base + 0x11c)34 #define PRCM_ARMITMSK63TO32 (prcmu_base + 0x120)35 #define PRCM_ARMITMSK95TO64 (prcmu_base + 0x124)36 #define PRCM_ARMITMSK127TO96 (prcmu_base + 0x128)37 #define PRCM_POWER_STATE_VAL (prcmu_base + 0x25C)38 #define PRCM_ARMITVAL31TO0 (prcmu_base + 0x260)[all …]