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Searched refs:phys_ctr (Results 1 – 4 of 4) sorted by relevance

/linux-5.19.10/arch/powerpc/platforms/cell/
Dpmu.c62 u32 cbe_read_phys_ctr(u32 cpu, u32 phys_ctr) in cbe_read_phys_ctr() argument
66 if (phys_ctr < NR_PHYS_CTRS) { in cbe_read_phys_ctr()
70 if (val_in_latch & (1 << phys_ctr)) { in cbe_read_phys_ctr()
71 READ_SHADOW_REG(val, pm_ctr[phys_ctr]); in cbe_read_phys_ctr()
73 READ_MMIO_UPPER32(val, pm_ctr[phys_ctr]); in cbe_read_phys_ctr()
81 void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val) in cbe_write_phys_ctr() argument
86 if (phys_ctr < NR_PHYS_CTRS) { in cbe_write_phys_ctr()
91 WRITE_WO_MMIO(pm_ctr[phys_ctr], val); in cbe_write_phys_ctr()
102 shadow_regs->counter_value_in_latch |= (1 << phys_ctr); in cbe_write_phys_ctr()
117 u32 phys_ctr = ctr & (NR_PHYS_CTRS - 1); in cbe_read_ctr() local
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/linux-5.19.10/drivers/ps3/
Dps3-lpm.c198 u32 ps3_read_phys_ctr(u32 cpu, u32 phys_ctr) in ps3_read_phys_ctr() argument
204 if (phys_ctr >= NR_PHYS_CTRS) { in ps3_read_phys_ctr()
206 __LINE__, phys_ctr); in ps3_read_phys_ctr()
214 "phys_ctr %u, %s\n", __func__, __LINE__, phys_ctr, in ps3_read_phys_ctr()
219 switch (phys_ctr) { in ps3_read_phys_ctr()
242 void ps3_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val) in ps3_write_phys_ctr() argument
250 if (phys_ctr >= NR_PHYS_CTRS) { in ps3_write_phys_ctr()
252 __LINE__, phys_ctr); in ps3_write_phys_ctr()
256 switch (phys_ctr) { in ps3_write_phys_ctr()
292 phys_ctr, val, ps3_result(result)); in ps3_write_phys_ctr()
[all …]
/linux-5.19.10/arch/powerpc/include/asm/
Dcell-pmu.h66 extern u32 cbe_read_phys_ctr(u32 cpu, u32 phys_ctr);
67 extern void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val);
76 extern u32 cbe_get_ctr_size(u32 cpu, u32 phys_ctr);
77 extern void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size);
Dps3.h496 u32 ps3_read_phys_ctr(u32 cpu, u32 phys_ctr);
497 void ps3_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val);
506 u32 ps3_get_ctr_size(u32 cpu, u32 phys_ctr);
507 void ps3_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size);